Searched refs:IRQ_VIRT_BASE (Results 1 – 9 of 9) sorted by relevance
/arch/arm/mach-dove/include/mach/ |
D | bridge-regs.h | 31 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) macro 42 #define IRQ_MASK_LOW (IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF) 43 #define FIQ_MASK_LOW (IRQ_VIRT_BASE + FIQ_MASK_LOW_OFF) 44 #define ENDPOINT_MASK_LOW (IRQ_VIRT_BASE + ENDPOINT_MASK_LOW_OFF) 45 #define IRQ_MASK_HIGH (IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF) 46 #define FIQ_MASK_HIGH (IRQ_VIRT_BASE + FIQ_MASK_HIGH_OFF) 47 #define ENDPOINT_MASK_HIGH (IRQ_VIRT_BASE + ENDPOINT_MASK_HIGH_OFF) 48 #define PCIE_INTERRUPT_MASK (IRQ_VIRT_BASE + PCIE_INTERRUPT_MASK_OFF)
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D | entry-macro.S | 14 ldr \base, =IRQ_VIRT_BASE
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/arch/arm/mach-mv78xx0/ |
D | irq.c | 28 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); in mv78xx0_init_irq() 29 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); in mv78xx0_init_irq() 30 orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF)); in mv78xx0_init_irq()
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/arch/arm/mach-kirkwood/ |
D | irq.c | 29 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); in kirkwood_init_irq() 30 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); in kirkwood_init_irq()
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/arch/arm/mach-mv78xx0/include/mach/ |
D | bridge-regs.h | 25 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) macro
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D | entry-macro.S | 14 ldr \base, =IRQ_VIRT_BASE
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/arch/arm/mach-dove/ |
D | irq.c | 109 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); in dove_init_irq() 110 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); in dove_init_irq()
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/arch/arm/mach-kirkwood/include/mach/ |
D | bridge-regs.h | 34 #define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) macro
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D | entry-macro.S | 14 ldr \base, =IRQ_VIRT_BASE
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