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Searched refs:MEM_STTIME3 (Results 1 – 3 of 3) sorted by relevance

/arch/mips/alchemy/common/
Dpower.c78 sleep_static_memctlr[3][1] = au_readl(MEM_STTIME3); in save_core_regs()
111 au_writel(sleep_static_memctlr[3][1], MEM_STTIME3); in restore_core_regs()
/arch/mips/alchemy/devboards/
Dpb1100.c85 au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */ in board_setup()
/arch/mips/include/asm/mach-au1x00/
Dau1000.h954 #define MEM_STTIME3 0xB4001034 macro