Searched refs:MSR_P4_CRU_ESCR1 (Results 1 – 3 of 3) sorted by relevance
| /arch/x86/oprofile/ |
| D | op_model_p4.c | 118 { CTR_IQ_5, MSR_P4_CRU_ESCR1} }
316 { CTR_IQ_5, MSR_P4_CRU_ESCR1} }
322 { CTR_IQ_5, MSR_P4_CRU_ESCR1} }
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| /arch/x86/kernel/cpu/ |
| D | perf_event_p4.c | 437 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
447 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
473 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
500 .escr_msr = { MSR_P4_CRU_ESCR0, MSR_P4_CRU_ESCR1 },
1138 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR1),
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| /arch/x86/include/asm/ |
| D | msr-index.h | 384 #define MSR_P4_CRU_ESCR1 0x000003b9 macro
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