Searched refs:MSR_P4_CRU_ESCR3 (Results 1 – 3 of 3) sorted by relevance
| /arch/x86/oprofile/ |
| D | op_model_p4.c | 112 {CTR_IQ_5, MSR_P4_CRU_ESCR3} }
214 { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
274 { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
298 { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
304 { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
310 { CTR_IQ_5, MSR_P4_CRU_ESCR3} }
461 addr <= MSR_P4_CRU_ESCR3; ++i, addr += addr_increment()) { in p4_fill_in_addresses()
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| /arch/x86/kernel/cpu/ |
| D | perf_event_p4.c | 407 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
415 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
429 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
463 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
480 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
491 .escr_msr = { MSR_P4_CRU_ESCR2, MSR_P4_CRU_ESCR3 },
1140 P4_ESCR_MSR_TABLE_ENTRY(MSR_P4_CRU_ESCR3),
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| /arch/x86/include/asm/ |
| D | msr-index.h | 386 #define MSR_P4_CRU_ESCR3 0x000003cd macro
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