Searched refs:MX31_IO_ADDRESS (Results 1 – 10 of 10) sorted by relevance
42 v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); in mx31_initialize_usb_hw()79 writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET)); in mx31_initialize_usb_hw()
137 mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); in imx31_init_early()144 mxc_init_irq(MX31_IO_ADDRESS(MX31_AVIC_BASE_ADDR)); in mx31_init_irq()184 imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS1_BASE_ADDR)); in imx31_soc_init()185 imx_set_aips(MX31_IO_ADDRESS(MX31_AIPS2_BASE_ADDR)); in imx31_soc_init()
193 __raw_writel(0x00004f00, MX31_IO_ADDRESS(MX31_WEIM_CSCRxU(3))); in qong_init_nand_mtd()194 __raw_writel(0x20013b31, MX31_IO_ADDRESS(MX31_WEIM_CSCRxL(3))); in qong_init_nand_mtd()195 __raw_writel(0x00020800, MX31_IO_ADDRESS(MX31_WEIM_CSCRxA(3))); in qong_init_nand_mtd()
41 srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV)); in mx31_read_cpu_rev()
31 #define IOMUX_BASE MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
28 MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR) : MX35_IO_ADDRESS(MX35_CCM_BASE_ADDR))
49 MX31_IO_ADDRESS(x))
514 __raw_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); in mx31moboard_poweroff()
626 mxc_timer_init(&ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), in mx31_clocks_init()
119 #define MX31_IO_ADDRESS(x) IOMEM(MX31_IO_P2V(x)) macro