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Searched refs:MX51_IO_ADDRESS (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-imx/
Dmm-imx5.c104 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); in imx51_init_early()
105 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); in imx51_init_early()
123 tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR)); in mx51_init_irq()
207 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS1_BASE_ADDR)); in imx51_soc_init()
208 imx_set_aips(MX51_IO_ADDRESS(MX51_AIPS2_BASE_ADDR)); in imx51_soc_init()
Dcpu-imx5.c28 void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR); in get_mx51_srev()
83 void __iomem *iim_base = MX51_IO_ADDRESS(MX53_IIM_BASE_ADDR); in get_mx53_srev()
Dcrm-regs-imx5.h14 #define MX51_CCM_BASE MX51_IO_ADDRESS(MX51_CCM_BASE_ADDR)
15 #define MX51_DPLL1_BASE MX51_IO_ADDRESS(MX51_PLL1_BASE_ADDR)
16 #define MX51_DPLL2_BASE MX51_IO_ADDRESS(MX51_PLL2_BASE_ADDR)
17 #define MX51_DPLL3_BASE MX51_IO_ADDRESS(MX51_PLL3_BASE_ADDR)
18 #define MX51_CORTEXA8_BASE MX51_IO_ADDRESS(MX51_ARM_BASE_ADDR)
19 #define MX51_GPC_BASE MX51_IO_ADDRESS(MX51_GPC_BASE_ADDR)
Dclock-mx51-mx53.c1595 mxc_timer_init(&gpt_clk, MX51_IO_ADDRESS(MX51_GPT1_BASE_ADDR), in mx51_clocks_init()
/arch/arm/plat-mxc/include/mach/
Dmx51.h129 #define MX51_IO_ADDRESS(x) IOMEM(MX51_IO_P2V(x)) macro