Searched refs:MXC_CCM_CCSR_PLL1_SW_CLK_SEL (Results 1 – 2 of 2) sorted by relevance
155 #define MXC_CCM_CCSR_PLL1_SW_CLK_SEL (1 << 2) /* 0: pll1_main_clk, macro
323 reg &= ~MXC_CCM_CCSR_PLL1_SW_CLK_SEL; in _clk_pll1_sw_set_parent()346 reg |= MXC_CCM_CCSR_PLL1_SW_CLK_SEL; in _clk_pll1_sw_set_parent()