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Searched refs:MXC_PLL_DP_CTL_DPDCK0_2_EN (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-imx/
Dcrm-regs-imx5.h44 #define MXC_PLL_DP_CTL_DPDCK0_2_EN 0x1000 macro
Dclock-mx51-mx53.c186 dbl = dp_ctl & MXC_PLL_DP_CTL_DPDCK0_2_EN; in clk_pll_get_rate()