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Searched refs:OMAP2_PM_PWSTCTRL (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-omap2/
Dpowerdomain2xxx_3xxx.c33 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap2_pwrdm_set_next_pwrst()
40 OMAP2_PM_PWSTCTRL, in omap2_pwrdm_read_next_pwrst()
59 OMAP2_PM_PWSTCTRL); in omap2_pwrdm_set_mem_onst()
72 OMAP2_PM_PWSTCTRL); in omap2_pwrdm_set_mem_retst()
94 OMAP2_PM_PWSTCTRL, m); in omap2_pwrdm_read_mem_retst()
103 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap2_pwrdm_set_logic_retst()
153 OMAP2_PM_PWSTCTRL, in omap3_pwrdm_read_logic_retst()
202 pwrdm->prcm_offs, OMAP2_PM_PWSTCTRL); in omap3_pwrdm_enable_hdwr_sar()
209 OMAP2_PM_PWSTCTRL); in omap3_pwrdm_disable_hdwr_sar()
Dpm24xx.c192 MPU_MOD, OMAP2_PM_PWSTCTRL); in omap2_enter_mpu_retention()
197 OMAP2_PM_PWSTCTRL); in omap2_enter_mpu_retention()
Dclockdomain2xxx_3xxx.c115 OMAP2_PM_PWSTCTRL); in omap2_clkdm_sleep()
123 OMAP2_PM_PWSTCTRL); in omap2_clkdm_wakeup()
Dprm2xxx_3xxx.h191 #define OMAP2_PM_PWSTCTRL 0x00e0 macro
Dsleep34xx.S46 #define PM_PWSTCTRL_MPU_P OMAP3430_PRM_BASE + MPU_MOD + OMAP2_PM_PWSTCTRL