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Searched refs:P2 (Results 1 – 20 of 20) sorted by relevance

/arch/blackfin/lib/
Dmemcpy.S37 P2 = R2 ; /* length */ define
57 P2 = P2 >> 2; define
58 CC = P2 <= 2;
61 P2 = R2; define
62 LSETUP(.Lthree_start, .Lthree_end) LC0=P2;
72 P2 += -1; /* because we unroll one iteration */
73 LSETUP(.Lword_loops, .Lword_loope) LC0=P2;
94 .Lbytes_left: P2 = R3;
97 LSETUP (.Lbyte_start, .Lbyte_end) LC0=P2;
112 P0 = P0 + P2;
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Dmemmove.S23 P2 = R2; /* P2 = count */ define
24 CC = P2 == 0; /* Check zero count*/
42 P1 = P2 >> 2; /* count = n/4 */
46 P2 = R2; /* set remainder */ define
62 CC = P2 == 0; /* any remaining bytes? */
68 .Lbytes: LSETUP (.Lbyte2_s, .Lbyte2_e) LC0=P2;
76 P2 += -1;
77 P0 = P0 + P2;
78 P3 = P3 + P2;
80 CC = P2 == 0;
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Douts.S20 P2 = R2; /* P2 = count */ define
22 LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
33 P2 = R2; /* P2 = count */ define
35 LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
46 P2 = R2; /* P2 = count */ define
48 LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
59 P2 = R2; /* P2 = count */ define
61 LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2;
Dmemset.S28 P2 = R2 ; /* P2 = count */ define
39 P1 = P2 >> 2; /* count = n/4 */
43 P2 = R3; define
49 CC = P0 == P2;
57 P2 = R2; define
60 CC = P2 == 0; /* Check zero count */
64 LSETUP (.Lbyte_loop , .Lbyte_loop) LC0=P2;
81 P2 -= P1; /* reduce count */
Dmemcmp.S25 P2 = R2 ; /* P2 = count */ define
34 P1 = P2 >> 2; /* count = n/4 */
37 P2 = R2; /* set remainder */ define
54 CC = P2 == 0; /* Check zero count*/
58 LSETUP (.Lbyte_loop_s, .Lbyte_loop_e) LC0=P2;
83 P2 += 4; /* remainder count*/
Dmemchr.S23 P2 = R2; /* P2 = count */ define
29 LSETUP (.Lbyte_loop_s, .Lbyte_loop_e) LC0=P2;
Dstrncpy.S30 P2 = R2 ; /* size */ define
34 LSETUP (1f, 2f) LC0 = P2;
Dins.S79 P2 = R2; /* P2 = count */ \
82 LSETUP(1f, 2f) LC0 = P2; \
Dudivsi3.S124 P2 = R1; define
169 IF !CC R1 = P2; /* if 2, restore stored divisor */
/arch/m68k/fpsp040/
Dstan.S33 | U = r + r*s*(P1 + s*(P2 + s*P3)), and
39 | U = r + r*s*(P1 + s*(P2 + s*P3)), and
224 faddx TANP2,%fp2 | ...P2+SP3
227 fmulx %fp1,%fp2 | ...S(P2+SP3)
230 faddx TANP1,%fp2 | ...P1+S(P2+SP3)
233 fmulx %fp1,%fp2 | ...S(P1+S(P2+SP3))
236 fmulx %fp0,%fp2 | ...RS(P1+S(P2+SP3))
241 faddx %fp2,%fp0 | ...R+RS(P1+S(P2+SP3))
262 faddx TANP2,%fp2 | ...P2+SP3
265 fmulx %fp0,%fp2 | ...S(P2+SP3)
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Dssin.S481 |--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
482 |--P2 = 2**(L) * Piby2_2
486 fmulx FP_SCR3(%a6),%fp5 | ...w = N*P2
/arch/c6x/lib/
Dmpyll.S32 ;; P2 = X1*Y1
34 ;; result = (P2 << 64) + (P1 << 32) + P0
36 ;; Since the result is also 64-bit, we can skip the P2 term.
/arch/blackfin/mach-common/
Dentry.S1184 [--sp] = P2;
1202 P2 = R7; define
1203 P3 = P3 + P2;
1207 P2.L = _trace_buff_offset;
1208 P2.H = _trace_buff_offset;
1209 [P2] = P3;
1211 P2.L = _software_trace_buff;
1212 P2.H = _software_trace_buff;
1217 P4 = P3 + P2;
1228 P2 = [sp++]; define
Ddpmc_modes.S291 #define PM_REG11 P2
/arch/powerpc/platforms/85xx/
DKconfig22 for memory allocation on P1/P2 QorIQ platforms.
/arch/ia64/kernel/
Dunwind_decoder.c212 UNW_DEC_BR_GR(P2, ((code & 0xf) << 1) | ((byte1 >> 7) & 1), in unw_decode_p2_p5()
/arch/cris/arch-v10/kernel/
Dkgdb.c386 P0, VR, P2, P3, enumerator
/arch/powerpc/boot/dts/
Dxpedite5370.dts565 /* PCI Express controller 2, wired to VPX P1,P2 backplane */
/arch/m68k/ifpsp060/src/
Dfplsp.S5564 #--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
5565 #--P2 = 2**(L) * Piby2_2
5569 fmul.x FP_SCR1(%a6),%fp5 # fp5 = w = N*P2
5634 # U = r + r*s*(P1 + s*(P2 + s*P3)), and #
5640 # U = r + r*s*(P1 + s*(P2 + s*P3)), and #
5810 fadd.x TANP2(%pc),%fp2 # P2+SP3
5813 fmul.x %fp1,%fp2 # S(P2+SP3)
5816 fadd.x TANP1(%pc),%fp2 # P1+S(P2+SP3)
5819 fmul.x %fp1,%fp2 # S(P1+S(P2+SP3))
5822 fmul.x %fp0,%fp2 # RS(P1+S(P2+SP3))
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Dfpsp.S6101 #--We are now ready to perform (R+r) - N*P1 - N*P2, P1 = 2**(L) * Piby2_1 and
6102 #--P2 = 2**(L) * Piby2_2
6106 fmul.x FP_SCR1(%a6),%fp5 # fp5 = w = N*P2