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Searched refs:PIC_MASTER_CMD (Results 1 – 5 of 5) sorted by relevance

/arch/mips/include/asm/
Di8259.h24 #define PIC_MASTER_CMD 0x20 macro
26 #define PIC_MASTER_ISR PIC_MASTER_CMD
57 outb(0x0C, PIC_MASTER_CMD); /* prepare for poll */ in i8259_irq()
58 irq = inb(PIC_MASTER_CMD) & 7; in i8259_irq()
/arch/mips/kernel/
Di8259.c102 ret = inb(PIC_MASTER_CMD) & mask; in i8259A_irq_pending()
129 outb(0x0B, PIC_MASTER_CMD); /* ISR register */ in i8259A_irq_real()
130 value = inb(PIC_MASTER_CMD) & irqmask; in i8259A_irq_real()
131 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */ in i8259A_irq_real()
177 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */ in mask_and_ack_8259A()
181 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ in mask_and_ack_8259A()
263 outb_p(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */ in init_8259A()
303 .start = PIC_MASTER_CMD,
/arch/x86/kernel/
Di8259.c102 ret = inb(PIC_MASTER_CMD) & mask; in i8259A_irq_pending()
131 outb(0x0B, PIC_MASTER_CMD); /* ISR register */ in i8259A_irq_real()
132 value = inb(PIC_MASTER_CMD) & irqmask; in i8259A_irq_real()
133 outb(0x0A, PIC_MASTER_CMD); /* back to the IRR register */ in i8259A_irq_real()
181 outb(0x60+PIC_CASCADE_IR, PIC_MASTER_CMD); in mask_and_ack_8259A()
185 outb(0x60+irq, PIC_MASTER_CMD); /* 'Specific EOI to master */ in mask_and_ack_8259A()
313 outb_pic(0x11, PIC_MASTER_CMD); /* ICW1: select 8259A-1 init */ in init_8259A()
/arch/x86/include/asm/
Di8259.h13 #define PIC_MASTER_CMD 0x20 macro
15 #define PIC_MASTER_ISR PIC_MASTER_CMD
/arch/mips/loongson/lemote-2f/
Dirq.c41 isr = inb(PIC_MASTER_CMD) & in mach_i8259_irq()