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Searched refs:PLL46XX_MRR_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm/plat-samsung/include/plat/
Dpll.h222 #define PLL46XX_MRR_SHIFT (24) macro
/arch/arm/mach-exynos/
Dclock-exynos4.c1399 vpll_con1 &= ~(PLL46XX_MRR_MASK << PLL46XX_MRR_SHIFT | \ in exynos4_vpll_set_rate()
1410 vpll_con1 |= exynos4_vpll_div[i][6] << PLL46XX_MRR_SHIFT; in exynos4_vpll_set_rate()