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Searched refs:PLL90XX_MDIV_MASK (Results 1 – 5 of 5) sorted by relevance

/arch/arm/plat-samsung/include/plat/
Dpll.h265 #define PLL90XX_MDIV_MASK (0xFF) macro
282 mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK; in s5p_get_pll90xx()
/arch/arm/mach-s5p64x0/
Dclock-s5p6440.c63 epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); in s5p6440_epll_set_rate()
Dclock-s5p6450.c63 epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK); in s5p6450_epll_set_rate()
/arch/arm/mach-s5pv210/
Dclock.c1200 PLL90XX_MDIV_MASK << PLL90XX_MDIV_SHIFT | \ in s5pv210_vpll_set_rate()
/arch/arm/mach-exynos/
Dclock-exynos4.c1394 PLL90XX_MDIV_MASK << PLL46XX_MDIV_SHIFT | \ in exynos4_vpll_set_rate()