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Searched refs:S3C2410_MISCCR_CLK0_FCLK (Results 1 – 2 of 2) sorted by relevance

/arch/arm/plat-s3c24xx/
Dclock-dclk.c137 source = S3C2410_MISCCR_CLK0_FCLK; in s3c24xx_clkout_setparent()
/arch/arm/mach-s3c24xx/include/mach/
Dregs-gpio.h466 #define S3C2410_MISCCR_CLK0_FCLK (2<<4) macro