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Searched refs:S5P64X0_CLK_SRC1 (Results 1 – 4 of 4) sorted by relevance

/arch/arm/mach-s5p64x0/include/mach/
Dregs-clock.h45 #define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C) macro
/arch/arm/mach-s5p64x0/
Dpm.c33 SAVE_ITEM(S5P64X0_CLK_SRC1),
Dclock-s5p6440.c397 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },
406 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
415 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
Dclock-s5p6450.c410 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 10, .size = 3 },
431 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
467 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },