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Searched refs:S5P_CLK_DIV2 (Results 1 – 5 of 5) sorted by relevance

/arch/arm/mach-s5pc100/include/mach/
Dregs-clock.h39 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro
/arch/arm/mach-s5pv210/
Dpm.c46 SAVE_ITEM(S5P_CLK_DIV2),
Dclock.c890 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
899 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
908 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
/arch/arm/mach-s5pc100/
Dclock.c1014 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 },
1034 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 20, .size = 4 },
1046 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
1094 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
1106 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
1118 .reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
/arch/arm/mach-s5pv210/include/mach/
Dregs-clock.h44 #define S5P_CLK_DIV2 S5P_CLKREG(0x308) macro