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Searched refs:S6_DMA_INTENABLE1 (Results 1 – 1 of 1) sorted by relevance

/arch/xtensa/variants/s6000/include/variant/
Ddmac.h25 #define S6_DMA_INTENABLE1 0x00C macro
283 writel(readl(dmac + S6_DMA_INTENABLE1) & ~(mask << S6_DMA_INT1_CHANNEL), in _s6dmac_disable_error_irqs()
284 dmac + S6_DMA_INTENABLE1); in _s6dmac_disable_error_irqs()