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Searched refs:S6_GREG1_BLOCK_SB (Results 1 – 2 of 2) sorted by relevance

/arch/xtensa/platforms/s6105/
Dsetup.c46 reg &= ~(1 << S6_GREG1_BLOCK_SB); in platform_setup()
51 reg |= 1 << S6_GREG1_BLOCK_SB; in platform_setup()
/arch/xtensa/variants/s6000/include/variant/
Dhardware.h130 #define S6_GREG1_BLOCK_SB 7 macro