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Searched refs:S6_GREG1_PLLSEL (Results 1 – 2 of 2) sorted by relevance

/arch/xtensa/platforms/s6105/
Dsetup.c38 reg = readl(S6_REG_GREG1 + S6_GREG1_PLLSEL); in platform_setup()
43 writel(reg, S6_REG_GREG1 + S6_GREG1_PLLSEL); in platform_setup()
/arch/xtensa/variants/s6000/include/variant/
Dhardware.h59 #define S6_GREG1_PLLSEL 0x010 macro