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Searched refs:SSI1 (Results 1 – 6 of 6) sorted by relevance

/arch/sh/kernel/cpu/sh4/
Dsetup-sh7760.c25 SSI0, SSI1, enumerator
54 INTC_VECT(SSI0, 0x940), INTC_VECT(SSI1, 0x960),
91 SSI0, SSI1, HAC0, HAC1, I2C0, I2C1, USB, LCDC,
110 { 0xfe080004, 0, 32, 4, /* INTPRI04 */ { HCAN20, HCAN21, SSI0, SSI1,
/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7763.c362 TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3, enumerator
405 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
428 LCDC, 0, IIC1, IIC0, SSI3, SSI2, SSI1, 0 } },
443 { 0xffd400a0, 0, 32, 8, /* INT2PRI8 */ { SSI3, SSI2, SSI1, 0 } },
Dsetup-sh7785.c490 SSI0, SSI1, enumerator
532 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
560 { 0, 0, 0, GDTA, DU, SSI0, SSI1, GPIO,
581 { 0xffd40020, 0, 32, 8, /* INT2PRI8 */ { FLCTL, GPIO, SSI0, SSI1, } },
Dsetup-sh7786.c709 SSI0, SSI1, SSI2, SSI3, enumerator
752 INTC_VECT(SSI0, 0xd20), INTC_VECT(SSI1, 0xd40),
825 DU, SSI0, SSI1, SSI2, SSI3,
864 { 0xfe41084c, 0, 32, 8, /* INT2PRI19 */ { DU, SSI0, SSI1, SSI2 } },
/arch/arm/boot/dts/
Dimx6q.dtsi180 ssi@02028000 { /* SSI1 */
/arch/arm/mach-imx/
Dclock-imx6q.c1023 DEF_CLK_DIV2(ssi1_div, &ssi1_clk, CS1CDR, SSI1);