Searched refs:SVC_MODE (Results 1 – 18 of 18) sorted by relevance
| /arch/arm/plat-iop/ |
| D | cp6.c | 44 .cpsr_val = SVC_MODE,
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| /arch/arm/common/ |
| D | fiq_glue.S | 61 cmp r4, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
66 msr cpsr_c, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
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| D | fiq_debugger.c | 241 case SVC_MODE: return "SVC"; in mode_name()
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| /arch/arm/kernel/ |
| D | entry-header.S | 54 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
60 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
66 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
72 eor \rtemp, \rtemp, #(SVC_MODE ^ SYSTEM_MODE)
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| D | head-nommu.S | 45 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
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| D | kprobes.c | 584 .cpsr_val = SVC_MODE,
592 .cpsr_val = SVC_MODE,
602 .cpsr_val = SVC_MODE,
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| D | sleep.S | 93 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off
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| D | head.S | 94 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
349 setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9
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| D | process.c | 618 regs.ARM_r7 = SVC_MODE | PSR_ENDSTATE | PSR_ISETSTATE; in kernel_thread()
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| D | traps.c | 379 if (processor_mode(regs) == SVC_MODE) { in do_undefinstr()
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| D | setup.c | 427 PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE) in cpu_init()
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| D | entry-armv.S | 1030 eor r0, r0, #(\mode ^ SVC_MODE | PSR_ISETSTATE)
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| /arch/arm/plat-s3c24xx/ |
| D | sleep.S | 57 mov r0, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
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| /arch/arm/mach-s3c64xx/ |
| D | sleep.S | 43 msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE
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| /arch/arm/include/asm/ |
| D | assembler.h | 92 msr cpsr_c, #PSR_I_BIT | SVC_MODE
96 msr cpsr_c, #SVC_MODE
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| D | ptrace.h | 45 #define SVC_MODE 0x00000013 macro
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| /arch/arm/mm/ |
| D | proc-xsc3.S | 110 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
450 mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
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| D | proc-xscale.S | 147 mov r1, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
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