Home
last modified time | relevance | path

Searched refs:TEGRA_APB_MISC_BASE (Results 1 – 7 of 7) sorted by relevance

/arch/arm/mach-tegra/
Ddevices.c88 .start = TEGRA_APB_MISC_BASE + 0x14,
89 .end = TEGRA_APB_MISC_BASE + 0x20 + 3,
94 .start = TEGRA_APB_MISC_BASE + 0x80,
95 .end = TEGRA_APB_MISC_BASE + 0x9c + 3,
100 .start = TEGRA_APB_MISC_BASE + 0xa0,
101 .end = TEGRA_APB_MISC_BASE + 0xb0 + 3,
106 .start = TEGRA_APB_MISC_BASE + 0x868,
107 .end = TEGRA_APB_MISC_BASE + 0x90c + 3,
Dfuse.c109 reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); in tegra_init_fuse()
112 id = readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804); in tegra_init_fuse()
Dboard-dt-tegra20.c57 OF_DEV_AUXDATA("nvidia,tegra20-pinmux", TEGRA_APB_MISC_BASE + 0x14, "tegra-pinmux", NULL),
Dheadsmp.S116 mov32 r6, TEGRA_APB_MISC_BASE
155 mov32 r6, TEGRA_APB_MISC_BASE
Dtegra30_clocks.c357 static void __iomem *misc_gp_hidrev_base = IO_ADDRESS(TEGRA_APB_MISC_BASE);
/arch/arm/mach-tegra/include/mach/
Duncompress.h110 volatile u32 *apb_misc = (volatile u32 *)TEGRA_APB_MISC_BASE; in arch_decomp_setup()
Diomap.h128 #define TEGRA_APB_MISC_BASE 0x70000000 macro