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Searched refs:TRAS_1 (Results 1 – 7 of 7) sorted by relevance

/arch/blackfin/include/asm/
Dmem_init.h84 #define SDRAM_tRAS TRAS_1
/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h769 #define TRAS_1 0x00000040 /* SDRAM tRAS = 1 cycle */ macro
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h973 #define TRAS_1 0x00000040 /* SDRAM tRAS = 1 cycle */ macro
/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h1311 #define TRAS_1 0x00000040 /* SDRAM tRAS = 1 cycle */ macro
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h972 #define TRAS_1 0x00000040 /* SDRAM tRAS = 1 cycle */ macro
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h1294 #define TRAS_1 0x00000040 /* SDRAM tRAS = 1 cycle … macro
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h1686 #define TRAS_1 0x00000040 /* SDRAM tRAS = 1 cycle */ macro