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Searched refs:UDCCS0_SST (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-pxa/include/mach/
Dpxa25x-udc.h27 #define UDCCS0_SST (1 << 4) /* Sent stall */ macro
/arch/arm/mach-ixp4xx/include/mach/
Dixp4xx-regs.h526 #define UDCCS0_SST (1 << 4) /* Sent stall */ macro
/arch/arm/mach-sa1100/include/mach/
DSA-1100.h152 #define UDCCS0_SST 0x00000004 /* Sent STall */ macro