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Searched refs:UDCCS10 (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-pxa/include/mach/
Dpxa25x-udc.h83 #define UDCCS10 __REG(0x40600038) /* UDC Endpoint 10 (Interrupt) Control/Status Register */ macro
/arch/arm/mach-ixp4xx/include/mach/
Dixp4xx-regs.h445 #define UDCCS10 IXP4XX_USB_REG(IXP4XX_USB_BASE_VIRT+0x0038) macro