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Searched refs:VR_CTL (Results 1 – 18 of 18) sorted by relevance

/arch/blackfin/include/mach-common/
Dpll.h81 _bfin_write_pll_relock(VR_CTL, val); in bfin_write_VR_CTL()
/arch/blackfin/mach-common/
Dclocks-init.c70 bfin_write16(VR_CTL, bfin_read_VR_CTL() | CLKBUFOE); in init_clocks()
Ddpmc_modes.S64 P3.H = hi(VR_CTL);
65 P3.L = lo(VR_CTL);
117 P0.H = hi(VR_CTL);
118 P0.L = lo(VR_CTL);
154 P0.H = hi(VR_CTL);
155 P0.L = lo(VR_CTL);
/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h19 #define VR_CTL 0xFFC00008 /* Voltage Regulator Control Register (16-bit) */ macro
DcdefBF532.h19 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
/arch/blackfin/mach-bf527/include/mach/
DdefBF522.h19 #define VR_CTL 0xFFC00008 /* Voltage Regulator Control Register */ macro
DcdefBF522.h14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h18 #define VR_CTL 0xFFC00008 /* Voltage Regulator Control Register (16-bit) */ macro
DcdefBF561.h18 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
/arch/blackfin/mach-bf518/include/mach/
DdefBF512.h17 #define VR_CTL 0xFFC00008 /* Voltage Regulator Control Register */ macro
DcdefBF512.h14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h16 #define VR_CTL 0xFFC00008 /* Voltage Regulator Control Register */ macro
DcdefBF534.h14 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h13 #define VR_CTL 0xFFC00008 /* Voltage Regulator Control Register (16-bit) */ macro
DcdefBF538.h15 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h19 #define VR_CTL 0xffc00008 /* Voltage Regulator Control Register */ macro
DcdefBF54x_base.h19 #define bfin_read_VR_CTL() bfin_read16(VR_CTL)
/arch/blackfin/kernel/
Ddebug-mmrs.c1332 D16(VR_CTL); in bfin_debug_mmrs_init()