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/arch/mips/lasat/image/
DMakefile9 ifndef Version
10 Version = "$(USER)-test" macro
/arch/cris/arch-v32/lib/
Dstrcmp.S6 ; Version 2. See the file COPYING for more details.
/arch/arm/boot/dts/
Dspear600-evb.dts6 * Version 2 or later at the following locations:
Dimx27-phytec-phycore.dts6 * Version 2 or later at the following locations:
Dimx6q-arm2.dts7 * Version 2 or later at the following locations:
Dimx6q-sabrelite.dts7 * Version 2 or later at the following locations:
Dsnowball.dts6 * Version 2 or later at the following locations:
Dimx53-evk.dts7 * Version 2 or later at the following locations:
Dimx53-qsb.dts7 * Version 2 or later at the following locations:
Dimx53-ard.dts7 * Version 2 or later at the following locations:
Dimx53-smd.dts7 * Version 2 or later at the following locations:
Dspear600.dtsi6 * Version 2 or later at the following locations:
Dimx51-babbage.dts7 * Version 2 or later at the following locations:
Dimx27.dtsi6 * Version 2 or later at the following locations:
Dimx51.dtsi7 * Version 2 or later at the following locations:
Ddb8500.dtsi6 * Version 2 or later at the following locations:
Dimx53.dtsi7 * Version 2 or later at the following locations:
Dimx6q.dtsi7 * Version 2 or later at the following locations:
/arch/mips/include/asm/fw/arc/
Dhinv.h126 USHORT Version; member
/arch/h8300/
DREADME24 * Toolchain Version
/arch/avr32/boards/atngw100/
DKconfig_mrmt4 prompt "RMT Version"
/arch/arm/mm/
DKconfig343 # XScale Core Version 3
559 ARM Architecture Version 3 TLB.
564 ARM Architecture Version 4 TLB with writethrough cache.
569 ARM Architecture Version 4 TLB with writeback cache.
574 ARM Architecture Version 4 TLB with writeback cache and invalidate
/arch/powerpc/boot/dts/
Dmpc8610_hpcd.dts7 * under the terms of the GNU General Public License Version 2 as published
Dvirtex440-ml507.dts16 * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6
/arch/microblaze/boot/dts/
Dsystem.dts25 * Version: Xilinx EDK 10.1.03 EDK_K_SP3.6

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