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Searched refs:__raw_readb (Results 1 – 25 of 95) sorted by relevance

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/arch/sh/boards/mach-sh03/
Drtc.c47 sec = (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10; in get_cmos_time()
48 min = (__raw_readb(RTC_MIN1) & 0xf) + (__raw_readb(RTC_MIN10) & 0xf) * 10; in get_cmos_time()
49 hour = (__raw_readb(RTC_HOU1) & 0xf) + (__raw_readb(RTC_HOU10) & 0xf) * 10; in get_cmos_time()
50 day = (__raw_readb(RTC_DAY1) & 0xf) + (__raw_readb(RTC_DAY10) & 0xf) * 10; in get_cmos_time()
51 mon = (__raw_readb(RTC_MON1) & 0xf) + (__raw_readb(RTC_MON10) & 0xf) * 10; in get_cmos_time()
52 year = (__raw_readb(RTC_YEA1) & 0xf) + (__raw_readb(RTC_YEA10) & 0xf) * 10 in get_cmos_time()
53 + (__raw_readb(RTC_YEA100 ) & 0xf) * 100 in get_cmos_time()
54 + (__raw_readb(RTC_YEA1000) & 0xf) * 1000; in get_cmos_time()
55 } while (sec != (__raw_readb(RTC_SEC1) & 0xf) + (__raw_readb(RTC_SEC10) & 0x7) * 10); in get_cmos_time()
96 if (!(__raw_readb(RTC_CTL) & RTC_BUSY)) in set_rtc_mmss()
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/arch/arm/mach-omap1/
Dfpga.c41 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) in fpga_mask_irq()
44 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_HI) in fpga_mask_irq()
47 __raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2) in fpga_mask_irq()
55 ((__raw_readb(OMAP1510_FPGA_ISR_LO) & in get_fpga_unmasked_irqs()
56 __raw_readb(OMAP1510_FPGA_IMR_LO))) | in get_fpga_unmasked_irqs()
57 ((__raw_readb(OMAP1510_FPGA_ISR_HI) & in get_fpga_unmasked_irqs()
58 __raw_readb(OMAP1510_FPGA_IMR_HI)) << 8) | in get_fpga_unmasked_irqs()
59 ((__raw_readb(INNOVATOR_FPGA_ISR2) & in get_fpga_unmasked_irqs()
60 __raw_readb(INNOVATOR_FPGA_IMR2)) << 16); in get_fpga_unmasked_irqs()
74 __raw_writeb((__raw_readb(OMAP1510_FPGA_IMR_LO) | (1 << irq)), in fpga_unmask_irq()
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/arch/arm/mach-ux500/include/mach/
Duncompress.h32 if (!(__raw_readb(ux500_uart_base + UART011_CR) & 0x1)) in putc()
38 while (__raw_readb(ux500_uart_base + UART01x_FR) & (1 << 5)) in putc()
45 if (!(__raw_readb(ux500_uart_base + UART011_CR) & 0x1)) in flush()
47 while (__raw_readb(ux500_uart_base + UART01x_FR) & (1 << 3)) in flush()
/arch/sh/kernel/cpu/
Dadc.c21 csr = __raw_readb(ADCSR); in adc_single()
26 csr = __raw_readb(ADCSR); in adc_single()
32 return (((__raw_readb(ADDRAH + off) << 8) | in adc_single()
33 __raw_readb(ADDRAL + off)) >> 6); in adc_single()
/arch/arm/mach-ep93xx/include/mach/
Dts72xx.h59 return __raw_readb(TS72XX_MODEL_VIRT_BASE) & TS72XX_MODEL_MASK; in ts72xx_model()
89 return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) & in is_max197_installed()
95 return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) & in is_ts9420_installed()
Duncompress.h14 static unsigned char __raw_readb(unsigned int ptr) in __raw_readb() function
54 if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF)) in putc()
/arch/arm/mach-s3c24xx/
Dbast-irq.c82 temp = __raw_readb(BAST_VA_PC104_IRQMASK); in bast_pc104_mask()
101 temp = __raw_readb(BAST_VA_PC104_IRQMASK); in bast_pc104_unmask()
120 stat = __raw_readb(BAST_VA_PC104_IRQREQ) & 0xf; in bast_irq_pc104_demux()
Dmach-osiris.c226 tmp = __raw_readb(OSIRIS_VA_CTRL0); in osiris_nand_select()
275 pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0); in osiris_pm_suspend()
400 if ((__raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK) >= 4) { in osiris_map_io()
402 __raw_readb(OSIRIS_VA_IDREG) & OSIRIS_ID_REVMASK); in osiris_map_io()
/arch/sh/include/cpu-sh3/cpu/
Ddac.h20 v = __raw_readb(DACR); in sh_dac_enable()
29 v = __raw_readb(DACR); in sh_dac_disable()
/arch/arm/mach-ebsa110/
Dcore.c60 if (__raw_readb(IRQ_MASK) != 0x55) in ebsa110_init_irq()
166 count = __raw_readb(PIT_T1); in ebsa110_gettimeoffset()
167 count |= __raw_readb(PIT_T1) << 8; in ebsa110_gettimeoffset()
194 count = __raw_readb(PIT_T1); in ebsa110_timer_interrupt()
195 count |= __raw_readb(PIT_T1) << 8; in ebsa110_timer_interrupt()
Dio.c74 ret = __raw_readb(a); in __readb()
217 ret = __raw_readb((void __iomem *)ISAIO_BASE + (port << 2)); in __inb8()
227 ret = __raw_readb(a); in __inb8()
248 return __raw_readb((void __iomem *)ISAIO_BASE + offset); in __inb16()
/arch/sh/include/mach-common/mach/
Dmagicpanelr2.h22 #define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg)
25 #define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg)
/arch/sh/include/asm/
Dwatchdog.h127 return __raw_readb(WTCNT_R); in sh_wdt_read_cnt()
149 return __raw_readb(WTCSR_R); in sh_wdt_read_csr()
/arch/sh/boards/mach-hp6xx/
Dpm.c62 stbcr = __raw_readb(STBCR); in pm_enter()
121 stbcr = __raw_readb(STBCR); in hp6x0_pm_enter()
124 stbcr2 = __raw_readb(STBCR2); in hp6x0_pm_enter()
/arch/arm/mach-ixp2000/include/mach/
Dio.h43 #define inb(p) ({ unsigned int __v = __raw_readb(alignb(___io(p))); __v; })
64 __v = __raw_readb(alignb(p)); \
66 __v = __raw_readb(p); \
/arch/blackfin/include/asm/
Dio.h30 #define __raw_readb __raw_readb macro
/arch/m68k/platform/coldfire/
Dintc-2.c123 if (__raw_readb(icraddr) == 0) in intc_irq_startup()
133 v = __raw_readb(MCFEPORT_EPDDR); in intc_irq_startup()
137 v = __raw_readb(MCFEPORT_EPIER); in intc_irq_startup()
Dintc-simr.c103 v = __raw_readb(MCFEPORT_EPDDR); in intc_irq_startup()
107 v = __raw_readb(MCFEPORT_EPIER); in intc_irq_startup()
/arch/sh/include/cpu-sh2/cpu/
Dwatchdog.h47 return __raw_readb(RSTCSR_R); in sh_wdt_read_rstcsr()
/arch/arm/mach-ep93xx/
Dts72xx.c86 bits = __raw_readb(addr) & ~0x07; in ts72xx_nand_hwcontrol()
105 return !!(__raw_readb(addr) & 0x20); in ts72xx_nand_device_ready()
190 return __raw_readb(TS72XX_RTC_DATA_VIRT_BASE); in ts72xx_rtc_readbyte()
/arch/sh/kernel/cpu/sh3/
Dserial-sh770x.c25 data = __raw_readb(SCPDR); in sh770x_sci_init_pins()
/arch/sh/kernel/cpu/sh4a/
Dsetup-sh7724.c1312 sh7724_rstandby_state.imr0 = __raw_readb(0xa4080080); /* IMR0 */ in sh7724_pre_sleep_notifier_call()
1313 sh7724_rstandby_state.imr1 = __raw_readb(0xa4080084); /* IMR1 */ in sh7724_pre_sleep_notifier_call()
1314 sh7724_rstandby_state.imr2 = __raw_readb(0xa4080088); /* IMR2 */ in sh7724_pre_sleep_notifier_call()
1315 sh7724_rstandby_state.imr3 = __raw_readb(0xa408008c); /* IMR3 */ in sh7724_pre_sleep_notifier_call()
1316 sh7724_rstandby_state.imr4 = __raw_readb(0xa4080090); /* IMR4 */ in sh7724_pre_sleep_notifier_call()
1317 sh7724_rstandby_state.imr5 = __raw_readb(0xa4080094); /* IMR5 */ in sh7724_pre_sleep_notifier_call()
1318 sh7724_rstandby_state.imr6 = __raw_readb(0xa4080098); /* IMR6 */ in sh7724_pre_sleep_notifier_call()
1319 sh7724_rstandby_state.imr7 = __raw_readb(0xa408009c); /* IMR7 */ in sh7724_pre_sleep_notifier_call()
1320 sh7724_rstandby_state.imr8 = __raw_readb(0xa40800a0); /* IMR8 */ in sh7724_pre_sleep_notifier_call()
1321 sh7724_rstandby_state.imr9 = __raw_readb(0xa40800a4); /* IMR9 */ in sh7724_pre_sleep_notifier_call()
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/arch/sparc/include/asm/
Dio.h14 #define readb_be(__addr) __raw_readb(__addr)
/arch/arm/mach-davinci/
Dboard-dm365-evm.c238 return !(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 4 : 0)); in cpld_mmc_get_cd()
247 return !!(__raw_readb(cpld + CPLD_CARDSTAT) & BIT(module ? 5 : 1)); in cpld_mmc_get_ro()
418 u8 reg = __raw_readb(cpld + CPLD_LEDS); in cpld_led_set()
430 u8 reg = __raw_readb(cpld + CPLD_LEDS); in cpld_led_get()
502 if ((__raw_readb(cpld + CPLD_SWITCH) & BIT(5)) == 0) { in evm_init_cpld()
/arch/arm/include/asm/hardware/
Dioc.h22 #define ioc_readb(off) __raw_readb(IOC_BASE + (off))

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