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/arch/m32r/include/asm/
Daddrspace.h28 #define KSEGX(a) (((unsigned long)(a)) & 0xe0000000) argument
30 #define KSEGX(a) ((a) & 0xe0000000) argument
37 #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) argument
39 #define PHYSADDR(a) ((a) & 0x1fffffff) argument
46 #define KSEG0ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG0)) argument
47 #define KSEG1ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG1)) argument
48 #define KSEG2ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG2)) argument
49 #define KSEG3ADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | KSEG3)) argument
51 #define KSEG0ADDR(a) (((a) & 0x1fffffff) | KSEG0) argument
52 #define KSEG1ADDR(a) (((a) & 0x1fffffff) | KSEG1) argument
[all …]
Dbitops.h46 volatile __u32 *a = addr; in set_bit() local
50 a += (nr >> 5); in set_bit()
60 : "r" (a), "r" (mask) in set_bit()
82 volatile __u32 *a = addr; in clear_bit() local
86 a += (nr >> 5); in clear_bit()
97 : "r" (a), "r" (~mask) in clear_bit()
121 volatile __u32 *a = addr; in change_bit() local
125 a += (nr >> 5); in change_bit()
135 : "r" (a), "r" (mask) in change_bit()
155 volatile __u32 *a = addr; in test_and_set_bit() local
[all …]
/arch/sh/include/asm/
Daddrspace.h29 #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) argument
35 #define P1SEGADDR(a) \ argument
36 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
37 #define P2SEGADDR(a) \ argument
38 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
39 #define P3SEGADDR(a) \ argument
40 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
41 #define P4SEGADDR(a) \ argument
42 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
47 #define P1SEGADDR(a) ({ (void)(a); BUG(); NULL; }) argument
[all …]
Dbitops-grb.h7 volatile unsigned int *a = addr; in set_bit() local
10 a += nr >> 5; in set_bit()
23 "+r" (a) in set_bit()
31 volatile unsigned int *a = addr; in clear_bit() local
34 a += nr >> 5; in clear_bit()
46 "+r" (a) in clear_bit()
54 volatile unsigned int *a = addr; in change_bit() local
57 a += nr >> 5; in change_bit()
69 "+r" (a) in change_bit()
77 volatile unsigned int *a = addr; in test_and_set_bit() local
[all …]
Dbitops-llsc.h7 volatile unsigned int *a = addr; in set_bit() local
10 a += nr >> 5; in set_bit()
20 : "r" (a), "r" (mask) in set_bit()
28 volatile unsigned int *a = addr; in clear_bit() local
31 a += nr >> 5; in clear_bit()
41 : "r" (a), "r" (~mask) in clear_bit()
49 volatile unsigned int *a = addr; in change_bit() local
52 a += nr >> 5; in change_bit()
62 : "r" (a), "r" (mask) in change_bit()
70 volatile unsigned int *a = addr; in test_and_set_bit() local
[all …]
/arch/arm/mach-pnx4008/include/mach/
Di2c.h47 #define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */ argument
48 #define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */ argument
49 #define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */ argument
50 #define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */ argument
51 #define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */ argument
52 #define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */ argument
53 #define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */ argument
54 #define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */ argument
55 #define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */ argument
56 #define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */ argument
[all …]
/arch/arm/mach-lpc32xx/include/mach/
Di2c.h47 #define I2C_REG_RX(a) ((a)->ioaddr) /* Rx FIFO reg (RO) */ argument
48 #define I2C_REG_TX(a) ((a)->ioaddr) /* Tx FIFO reg (WO) */ argument
49 #define I2C_REG_STS(a) ((a)->ioaddr + 0x04) /* Status reg (RO) */ argument
50 #define I2C_REG_CTL(a) ((a)->ioaddr + 0x08) /* Ctl reg */ argument
51 #define I2C_REG_CKL(a) ((a)->ioaddr + 0x0c) /* Clock divider low */ argument
52 #define I2C_REG_CKH(a) ((a)->ioaddr + 0x10) /* Clock divider high */ argument
53 #define I2C_REG_ADR(a) ((a)->ioaddr + 0x14) /* I2C address */ argument
54 #define I2C_REG_RFL(a) ((a)->ioaddr + 0x18) /* Rx FIFO level (RO) */ argument
55 #define I2C_REG_TFL(a) ((a)->ioaddr + 0x1c) /* Tx FIFO level (RO) */ argument
56 #define I2C_REG_RXB(a) ((a)->ioaddr + 0x20) /* Num of bytes Rx-ed (RO) */ argument
[all …]
/arch/mips/include/asm/
Daddrspace.h48 #define KSEGX(a) ((_ACAST32_ (a)) & 0xe0000000) argument
53 #define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff) argument
54 #define XPHYSADDR(a) ((_ACAST64_(a)) & \ argument
73 #define CKSEG0ADDR(a) (CPHYSADDR(a) | CKSEG0) argument
74 #define CKSEG1ADDR(a) (CPHYSADDR(a) | CKSEG1) argument
75 #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) argument
76 #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) argument
80 #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) argument
81 #define CKSEG1ADDR(a) (CPHYSADDR(a) | KSEG1) argument
82 #define CKSEG2ADDR(a) (CPHYSADDR(a) | KSEG2) argument
[all …]
Dlocal.h12 atomic_long_t a; member
17 #define local_read(l) atomic_long_read(&(l)->a)
18 #define local_set(l, i) atomic_long_set(&(l)->a, (i))
20 #define local_add(i, l) atomic_long_add((i), (&(l)->a))
21 #define local_sub(i, l) atomic_long_sub((i), (&(l)->a))
22 #define local_inc(l) atomic_long_inc(&(l)->a)
23 #define local_dec(l) atomic_long_dec(&(l)->a)
43 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) in local_add_return()
44 : "Ir" (i), "m" (l->a.counter) in local_add_return()
57 : "=&r" (result), "=&r" (temp), "=m" (l->a.counter) in local_add_return()
[all …]
/arch/avr32/include/asm/
Daddrspace.h24 #define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) argument
27 #define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) argument
32 #define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ argument
34 #define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ argument
36 #define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ argument
38 #define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) \ argument
/arch/powerpc/include/asm/
Dppc-opcode.h116 #define __PPC_RA(a) (((a) & 0x1f) << 16) argument
120 #define __PPC_XA(a) ((((a) & 0x1f) << 16) | (((a) & 0x20) >> 3)) argument
143 #define PPC_DCBAL(a, b) stringify_in_c(.long PPC_INST_DCBAL | \ argument
144 __PPC_RA(a) | __PPC_RB(b))
145 #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ argument
146 __PPC_RA(a) | __PPC_RB(b))
147 #define PPC_LDARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LDARX | \ argument
148 __PPC_RT(t) | __PPC_RA(a) | \
150 #define PPC_LWARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LWARX | \ argument
151 __PPC_RT(t) | __PPC_RA(a) | \
[all …]
Dlocal.h9 atomic_long_t a; member
14 #define local_read(l) atomic_long_read(&(l)->a)
15 #define local_set(l,i) atomic_long_set(&(l)->a, (i))
17 #define local_add(i,l) atomic_long_add((i),(&(l)->a))
18 #define local_sub(i,l) atomic_long_sub((i),(&(l)->a))
19 #define local_inc(l) atomic_long_inc(&(l)->a)
20 #define local_dec(l) atomic_long_dec(&(l)->a)
22 static __inline__ long local_add_return(long a, local_t *l) in local_add_return() argument
33 : "r" (a), "r" (&(l->a.counter)) in local_add_return()
39 #define local_add_negative(a, l) (local_add_return((a), (l)) < 0) argument
[all …]
/arch/alpha/include/asm/
Dio_trivial.h9 IO_CONCAT(__IO_PREFIX,ioread8)(void __iomem *a) in IO_CONCAT()
11 return __kernel_ldbu(*(volatile u8 __force *)a); in IO_CONCAT()
15 IO_CONCAT(__IO_PREFIX,ioread16)(void __iomem *a) in IO_CONCAT()
17 return __kernel_ldwu(*(volatile u16 __force *)a); in IO_CONCAT()
21 IO_CONCAT(__IO_PREFIX,iowrite8)(u8 b, void __iomem *a) in IO_CONCAT()
23 __kernel_stb(b, *(volatile u8 __force *)a); in IO_CONCAT()
27 IO_CONCAT(__IO_PREFIX,iowrite16)(u16 b, void __iomem *a) in IO_CONCAT()
29 __kernel_stw(b, *(volatile u16 __force *)a); in IO_CONCAT()
35 IO_CONCAT(__IO_PREFIX,ioread32)(void __iomem *a) in IO_CONCAT()
37 return *(volatile u32 __force *)a; in IO_CONCAT()
[all …]
Dvga.h46 #define vga_readb(a) readb((u8 __iomem *)(a)) argument
47 #define vga_writeb(v,a) writeb(v, (u8 __iomem *)(a)) argument
55 # define __is_port_vga(a) \ argument
56 (((a) >= 0x3b0) && ((a) < 0x3e0) && \
57 ((a) != 0x3b3) && ((a) != 0x3d3))
59 # define __is_mem_vga(a) \ argument
60 (((a) >= 0xa0000) && ((a) <= 0xc0000))
62 # define FIXUP_IOADDR_VGA(a) do { \ argument
63 if (pci_vga_hose && __is_port_vga(a)) \
64 (a) += pci_vga_hose->io_space->start; \
[all …]
Dlocal.h9 atomic_long_t a; member
13 #define local_read(l) atomic_long_read(&(l)->a)
14 #define local_set(l,i) atomic_long_set(&(l)->a, (i))
15 #define local_inc(l) atomic_long_inc(&(l)->a)
16 #define local_dec(l) atomic_long_dec(&(l)->a)
17 #define local_add(i,l) atomic_long_add((i),(&(l)->a))
18 #define local_sub(i,l) atomic_long_sub((i),(&(l)->a))
32 :"=&r" (temp), "=m" (l->a.counter), "=&r" (result) in local_add_return()
33 :"Ir" (i), "m" (l->a.counter) : "memory"); in local_add_return()
49 :"=&r" (temp), "=m" (l->a.counter), "=&r" (result) in local_sub_return()
[all …]
/arch/mn10300/unit-asb2303/include/unit/
Dsmc91111.h27 #define SMC_inb(a, r) inb((unsigned long) ((a) + (r))) argument
28 #define SMC_outb(v, a, r) outb(v, (unsigned long) ((a) + (r))) argument
32 #define SMC_inw(a, r) inw((unsigned long) ((a) + (r))) argument
33 #define SMC_outw(v, a, r) outw(v, (unsigned long) ((a) + (r))) argument
34 #define SMC_insw(a, r, p, l) insw((unsigned long) ((a) + (r)), (p), (l)) argument
35 #define SMC_outsw(a, r, p, l) outsw((unsigned long) ((a) + (r)), (p), (l)) argument
39 #define SMC_inl(a, r) inl((unsigned long) ((a) + (r))) argument
40 #define SMC_outl(v, a, r) outl(v, (unsigned long) ((a) + (r))) argument
41 #define SMC_insl(a, r, p, l) insl((unsigned long) ((a) + (r)), (p), (l)) argument
42 #define SMC_outsl(a, r, p, l) outsl((unsigned long) ((a) + (r)), (p), (l)) argument
/arch/avr32/mach-at32ap/include/mach/
Dio.h10 # define ioswabb(a, x) (x) argument
11 # define ioswabw(a, x) (x) argument
12 # define ioswabl(a, x) (x) argument
13 # define __mem_ioswabb(a, x) (x) argument
14 # define __mem_ioswabw(a, x) swab16(x) argument
15 # define __mem_ioswabl(a, x) swab32(x) argument
20 # define ioswabb(a, x) (x) argument
21 # define ioswabw(a, x) (x) argument
22 # define ioswabl(a, x) swahw32(x) argument
23 # define __mem_ioswabb(a, x) (x) argument
[all …]
/arch/arm/nwfpe/
Dsoftfloat.c113 INLINE bits32 extractFloat32Frac( float32 a ) in extractFloat32Frac() argument
116 return a & 0x007FFFFF; in extractFloat32Frac()
125 INLINE int16 extractFloat32Exp( float32 a ) in extractFloat32Exp() argument
128 return ( a>>23 ) & 0xFF; in extractFloat32Exp()
138 INLINE flag extractFloat32Sign( float32 a )
141 return a>>31;
294 INLINE bits64 extractFloat64Frac( float64 a ) in extractFloat64Frac() argument
297 return a & LIT64( 0x000FFFFFFFFFFFFF ); in extractFloat64Frac()
306 INLINE int16 extractFloat64Exp( float64 a ) in extractFloat64Exp() argument
309 return ( a>>52 ) & 0x7FF; in extractFloat64Exp()
[all …]
Dsoftfloat-specialize12 of this code was written as part of a project to build a fixed-point vector
43 defined here if desired. It is currently not possible for such a trap to
44 substitute a result value. If traps are not implemented, this routine
71 The pattern for a default generated single-precision NaN.
78 Returns 1 if the single-precision floating-point value `a' is a NaN;
82 flag float32_is_nan( float32 a )
85 return ( 0xFF000000 < (bits32) ( a<<1 ) );
91 Returns 1 if the single-precision floating-point value `a' is a signaling
95 flag float32_is_signaling_nan( float32 a )
98 return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
[all …]
/arch/mips/include/asm/mach-generic/
Dmangle-port.h30 # define ioswabb(a, x) (x) argument
31 # define __mem_ioswabb(a, x) (x) argument
32 # define ioswabw(a, x) le16_to_cpu(x) argument
33 # define __mem_ioswabw(a, x) (x) argument
34 # define ioswabl(a, x) le32_to_cpu(x) argument
35 # define __mem_ioswabl(a, x) (x) argument
36 # define ioswabq(a, x) le64_to_cpu(x) argument
37 # define __mem_ioswabq(a, x) (x) argument
41 # define ioswabb(a, x) (x) argument
42 # define __mem_ioswabb(a, x) (x) argument
[all …]
/arch/powerpc/net/
Dbpf_jit.h79 #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | __PPC_RT(d) | \ argument
80 __PPC_RA(a) | IMM_L(i))
81 #define PPC_MR(d, a) PPC_OR(d, a, a) argument
83 #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ argument
84 __PPC_RS(d) | __PPC_RA(a) | IMM_L(i))
108 #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | __PPC_RA(a) | IMM_L(i)) argument
109 #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | __PPC_RA(a) | IMM_L(i)) argument
110 #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | __PPC_RA(a) | IMM_L(i)) argument
111 #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | __PPC_RA(a) | __PPC_RB(b)) argument
113 #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | __PPC_RT(d) | \ argument
[all …]
/arch/sh/kernel/cpu/sh4/
Dsoftfloat.c42 #define LIT64( a ) a##LL argument
71 bits64 extractFloat64Frac(float64 a);
72 flag extractFloat64Sign(float64 a);
73 int16 extractFloat64Exp(float64 a);
74 int16 extractFloat32Exp(float32 a);
75 flag extractFloat32Sign(float32 a);
76 bits32 extractFloat32Frac(float32 a);
78 void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr);
80 void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr);
81 float64 float64_sub(float64 a, float64 b);
[all …]
/arch/arm/mach-ebsa110/
Dio.c33 u32 ret, a = (u32 __force) addr; in __isamem_convert_addr() local
51 ret = (a & 0xf803fe) << 1; in __isamem_convert_addr()
52 ret |= (a & 0x03fc00) << 2; in __isamem_convert_addr()
56 if ((a & 0x20000) == (a & 0x40000) >> 1) in __isamem_convert_addr()
68 void __iomem *a = __isamem_convert_addr(addr); in __readb() local
72 ret = __raw_readl(a); in __readb()
74 ret = __raw_readb(a); in __readb()
80 void __iomem *a = __isamem_convert_addr(addr); in __readw() local
85 return __raw_readw(a); in __readw()
90 void __iomem *a = __isamem_convert_addr(addr); in __readl() local
[all …]
/arch/x86/math-emu/
Dreg_add_sub.c28 int add_sub_specials(FPU_REG const *a, u_char taga, u_char signa,
38 FPU_REG *a = &st(0); in FPU_add() local
42 u_char signa = getsign(a); in FPU_add()
47 expa = exponent(a); in FPU_add()
55 FPU_u_add(a, b, dest, control_w, signa, expa, expb); in FPU_add()
60 diff = a->sigh - b->sigh; /* This works only if the ms bits in FPU_add()
63 diff = a->sigl > b->sigl; in FPU_add()
65 diff = -(a->sigl < b->sigl); in FPU_add()
71 FPU_u_sub(a, b, dest, control_w, signa, in FPU_add()
75 FPU_u_sub(b, a, dest, control_w, signb, in FPU_add()
[all …]
/arch/s390/kernel/
Dsys_s390.c52 struct s390_mmap_arg_struct a; in SYSCALL_DEFINE1() local
55 if (copy_from_user(&a, arg, sizeof(a))) in SYSCALL_DEFINE1()
57 error = sys_mmap_pgoff(a.addr, a.len, a.prot, a.flags, a.fd, a.offset); in SYSCALL_DEFINE1()
117 struct fadvise64_64_args a; in SYSCALL_DEFINE1() local
119 if ( copy_from_user(&a, args, sizeof(a)) ) in SYSCALL_DEFINE1()
121 return sys_fadvise64_64(a.fd, a.offset, a.len, a.advice); in SYSCALL_DEFINE1()

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