| /arch/xtensa/lib/ |
| D | memcopy.S | 102 add a7, a3, a4 # a7 = end address for source
110 blt a3, a7, .Lnextbyte
135 l8ui a7, a3, 1
139 s8i a7, a5, 1
158 srli a7, a4, 4 # number of loop iterations with 16B
167 loopnez a7, .Loop1done
169 beqz a7, .Loop1done
170 slli a8, a7, 4
175 l32i a7, a3, 4
178 s32i a7, a5, 4
[all …]
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| D | usercopy.S | 88 srli a7, a4, 4 # number of loop iterations with 16B
116 EX(l8ui, a7, a3, 1, l_fixup)
119 EX(s8i, a7, a5, 1, s_fixup)
135 add a7, a3, a4 # a7 = end address for source
143 blt a3, a7, .Lnextbyte
157 loopnez a7, .Loop1done
159 beqz a7, .Loop1done
160 slli a8, a7, 4
165 EX(l32i, a7, a3, 4, l_fixup)
168 EX(s32i, a7, a5, 4, s_fixup)
[all …]
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| D | checksum.S | 63 l32i a7, a2, 4
65 ONES_ADD(a4, a7)
67 l32i a7, a2, 12
69 ONES_ADD(a4, a7)
71 l32i a7, a2, 20
73 ONES_ADD(a4, a7)
75 l32i a7, a2, 28
77 ONES_ADD(a4, a7)
143 l16ui a7, a2, 1 /* bits 8..23 */
150 slli a7, a7, 8
[all …]
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| D | memset.S | 48 slli a7, a3, 8 # duplicate character in all bytes of word
49 or a3, a3, a7 # ...
50 slli a7, a3, 16 # ...
51 or a3, a3, a7 # ...
56 srli a7, a4, 4 # number of loop iterations with 16B
69 loopnez a7, .Loop1done
71 beqz a7, .Loop1done
72 slli a6, a7, 4
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| D | strnlen_user.S | 46 # a7/ mask2
62 movi a7, MASK2 # mask for byte 2
84 bnone a9, a7, .Lz2 # if byte 2 is zero
136 bnone a9, a7, .Lz2 # if byte 2 (of word, not string) is zero
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| D | strncpy_user.S | 49 # a7/ mask2
67 movi a7, MASK2 # mask for byte 2
124 bnone a9, a7, .Lz2 # if byte 2 is zero
138 bnone a9, a7, .Lz0 # if byte 2 is zero
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| /arch/m68k/fpsp040/ |
| D | x_fline.S | 38 cmpw #UNIMP_VEC,EXC_VEC-4(%a7)
44 subl #4,%a7 |4 accounts for 2-word difference
48 fsave -(%a7)
53 addl #4,%a6 |to offset the sub.l #4,a7 above so that
68 cmpib #VER_40,(%a7) |test for orig unimp frame
70 subl #UNIMP_40_SIZE-4,%a7 |emulate an orig fsave
71 moveb #VER_40,(%a7)
72 moveb #UNIMP_40_SIZE-4,1(%a7)
73 clrw 2(%a7)
76 cmpib #VER_41,(%a7) |test for rev unimp frame
[all …]
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| D | x_snan.S | 44 fsave -(%a7)
75 frestore (%a7)+
89 moveb (%a7),VER_TMP(%a6)
90 cmpib #VER_40,(%a7) |test for orig unimp frame
97 clrl (%a7)
99 clrl -(%a7) |clear and dec a7
101 moveb VER_TMP(%a6),(%a7) |format a busy frame
102 moveb #BUSY_SIZE-4,1(%a7)
108 frestore (%a7)+
117 moveb (%a7),VER_TMP(%a6)
[all …]
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| D | gen_except.S | 58 cmpib #IDLE_SIZE-4,1(%a7) |test for idle frame
60 cmpib #UNIMP_40_SIZE-4,1(%a7) |test for orig unimp frame
62 cmpib #UNIMP_41_SIZE-4,1(%a7) |test for rev unimp frame
64 cmpib #BUSY_SIZE-4,1(%a7) |if size <> $60, fmt error
66 leal BUSY_SIZE+LOCAL_SIZE(%a7),%a1 |init a1 so fpsp.h
102 cmpib #UNIMP_40_SIZE-4,1(%a7) |test for orig unimp frame
104 leal UNIMP_40_SIZE+LOCAL_SIZE(%a7),%a1
107 cmpib #UNIMP_41_SIZE-4,1(%a7) |test for rev unimp frame
109 leal UNIMP_41_SIZE+LOCAL_SIZE(%a7),%a1
131 addl #4,%a7 |point A7 back to unimp frame
[all …]
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| D | sto_res.S | 37 fmovemx %fp1-%fp1,-(%a7)
42 fmovemx (%a7)+,%d0
70 fmovemx %fp0-%fp0,-(%a7)
75 fmovemx (%a7)+,%d0
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| D | bugfix.S | 174 cmpib #VER_40,4(%a7)
271 movel (%a7)+,%d1 |save return address from bsr
272 frestore (%a7)+
273 fsave -(%a7)
277 cmpw #0x4060,(%a7)
309 clrl (%a7)
311 clrl -(%a7)
313 movel #0x40600000,-(%a7)
318 movel %d1,-(%a7) |return bsr return address
397 movel (%a7)+,%d1 |save return address from bsr
[all …]
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| D | x_unimp.S | 44 fsave -(%a7)
49 moveb (%a7),%d0 |test for valid version num
69 fsave -(%a7) |capture possible exc state
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| D | x_unfl.S | 47 fsave -(%a7)
76 frestore (%a7)+
111 frestore (%a7)+
130 frestore (%a7)+
147 movew #0,-(%a7)
148 movew %d0,-(%a7) |copy RND_PREC to stack
194 addl (%a7)+,%d1 |merge PREC/MODE
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| D | sgetem.S | 118 movel %d3,-(%a7) |save d3
122 movel (%a7)+,%d3 |restore d3
126 moveml %d3/%d5/%d6,-(%a7) |save registers
136 moveml (%a7)+,%d3/%d5/%d6 |restore registers
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| D | stanh.S | 105 movel %d1,-(%a7)
109 movel (%a7)+,%d1
141 movel %d1,-(%a7)
145 movel (%a7)+,%d1
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| D | sasin.S | 76 fmovemx %fp2-%fp2,-(%a7)
80 fmovemx (%a7)+,%fp2-%fp2
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| /arch/xtensa/kernel/ |
| D | align.S | 170 s32i a7, a2, PT_AREG7
200 rsr a7, EPC_1 # load exception address
202 and a3, a3, a7 # mask lower bits
207 __ssa8 a7
250 addi a7, a7, 2 # increment PC (assume 16-bit insn)
255 addi a7, a7, 1
257 addi a7, a7, 3
279 bne a7, a5, 1f
283 rsr a7, LBEG # set PC to LBEGIN
287 1: wsr a7, EPC_1 # skip load instruction
[all …]
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| D | vectors.S | 406 s32e a7, a0, -20
416 l32e a7, a1, -12
418 l32e a4, a7, -32
420 l32e a5, a7, -28
421 l32e a6, a7, -24
422 l32e a7, a7, -20
439 s32e a7, a0, -36
460 l32e a7, a11, -36
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| D | entry.S | 152 s32i a7, a1, PT_AREG7
421 movi a7, 0
433 load_xtregs_opt a1 a2 a4 a5 a6 a7 PT_XTREGS_OPT
454 rotw -1 # we restore a4..a7
467 2: rotw -1 # a0..a3 become a4..a7
468 addi a3, a7, -4*4 # next iteration
473 l32i a7, a3, PT_AREG_END + 12
485 addi a3, a7, -1
489 movi a7, 0
591 l32i a7, a1, PT_AREG7
[all …]
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| D | head.S | 175 2: l32i a7, a6, 0 # load word
177 s32i a7, a4, 0 # store word
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| /arch/xtensa/boot/boot-redboot/ |
| D | bootstrap.S | 93 mov.n a7, a0
97 l32i a10, a7, 0
98 l32i a11, a7, 4
101 l32i a10, a7, 8
102 l32i a11, a7, 12
106 addi a7, a7, 16
150 movi a7, __bss_end
155 blt a6, a7, 3b
176 movi a7, 0x1000000
184 # a7 maximum size of destination
[all …]
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| /arch/xtensa/mm/ |
| D | misc.S | 35 __loopi a2, a7, PAGE_SIZE, 32
44 __endla a2, a7, 32
116 movi a7, (1 << PG_ARCH_1)
121 or a5, a5, a7
145 __loopi a2, a7, PAGE_SIZE, 32
154 __endla a2, a7, 32
181 xor a7, a3, a4
184 extui a7, a7, PAGE_SHIFT, DCACHE_ALIAS_ORDER
208 1: beqz a7, 1f
213 add a7, a3, a5 # ppn
[all …]
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| /arch/m68k/platform/coldfire/ |
| D | head.S | 177 movel #CONFIG_VECTORBASE,%a7
178 movec %a7,%VBR /* set vectors addr */
179 movel %a7,_ramvec
181 movel #CONFIG_RAMBASE,%a7 /* mark the base of RAM */
182 movel %a7,_rambase
185 addl %a7,%d0
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| /arch/mips/include/asm/ |
| D | regdef.h | 79 #define a7 $11 macro
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| /arch/mips/kernel/ |
| D | mcount.S | 33 PTR_S a7, PT_R11(sp)
48 PTR_L a7, PT_R11(sp)
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