/arch/x86/kernel/apic/ |
D | apic.c | 272 apic_write(APIC_ICR2, SET_APIC_DEST_FIELD(id)); in native_apic_icr_write() 273 apic_write(APIC_ICR, low); in native_apic_icr_write() 341 apic_write(APIC_LVTT, lvtt_value); in __setup_APIC_LVTT() 347 apic_write(APIC_TDCR, in __setup_APIC_LVTT() 352 apic_write(APIC_TMICT, clocks / APIC_DIVISOR); in __setup_APIC_LVTT() 439 apic_write(reg, new); in setup_APIC_eilvt() 451 apic_write(APIC_TMICT, delta); in lapic_next_event() 480 apic_write(APIC_LVTT, v); in lapic_timer_setup() 481 apic_write(APIC_TMICT, 0); in lapic_timer_setup() 935 apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); in clear_local_APIC() [all …]
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D | bigsmp_32.c | 77 apic_write(APIC_DFR, APIC_DFR_FLAT); in bigsmp_init_apic_ldr() 79 apic_write(APIC_LDR, val); in bigsmp_init_apic_ldr()
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D | es7000_32.c | 488 apic_write(APIC_DFR, APIC_DFR_CLUSTER); in es7000_init_apic_ldr_cluster() 490 apic_write(APIC_LDR, val); in es7000_init_apic_ldr_cluster() 498 apic_write(APIC_DFR, APIC_DFR_FLAT); in es7000_init_apic_ldr() 500 apic_write(APIC_LDR, val); in es7000_init_apic_ldr()
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D | apic_flat_64.c | 72 apic_write(APIC_DFR, APIC_DFR_FLAT); in flat_init_apic_ldr() 75 apic_write(APIC_LDR, val); in flat_init_apic_ldr()
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D | summit_32.c | 225 apic_write(APIC_DFR, SUMMIT_APIC_DFR_VALUE); in summit_init_apic_ldr() 228 apic_write(APIC_LDR, val); in summit_init_apic_ldr()
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D | x2apic_uv_x.c | 346 apic_write(APIC_SELF_IPI, vector); in uv_send_IPI_self() 739 apic_write(APIC_LVT1, value); in uv_nmi_init()
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D | io_apic.c | 1842 apic_write(APIC_ESR, 0); in print_local_APIC() 2762 apic_write(APIC_LVT0, v | APIC_LVT_MASKED); in mask_lapic_irq() 2770 apic_write(APIC_LVT0, v & ~APIC_LVT_MASKED); in unmask_lapic_irq() 2895 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT); in check_timer() 2984 apic_write(APIC_LVT0, APIC_DM_FIXED | cfg->vector); /* Fixed mode */ in check_timer() 2993 apic_write(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_FIXED | cfg->vector); in check_timer() 3001 apic_write(APIC_LVT0, APIC_DM_EXTINT); in check_timer()
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/arch/x86/include/asm/ |
D | x2apic.h | 64 apic_write(APIC_SELF_IPI, vector); in x2apic_send_IPI_self()
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D | apic.h | 424 static inline void apic_write(u32 reg, u32 val) in apic_write() function 452 static inline void apic_write(u32 reg, u32 val) { } in apic_write() function 468 apic_write(APIC_EOI, 0); in ack_APIC_irq()
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/arch/x86/kernel/cpu/mcheck/ |
D | therm_throt.c | 441 apic_write(APIC_LVTTHMR, lvtthmr_init); in intel_init_thermal() 470 apic_write(APIC_LVTTHMR, h); in intel_init_thermal() 501 apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED); in intel_init_thermal()
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D | mce_intel.c | 221 apic_write(APIC_LVTCMCI, THRESHOLD_APIC_VECTOR|APIC_DM_FIXED); in intel_init_cmci()
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/arch/x86/oprofile/ |
D | nmi_int.c | 352 apic_write(APIC_LVTPC, APIC_DM_NMI); in nmi_cpu_setup() 384 apic_write(APIC_LVTERR, v | APIC_LVT_MASKED); in nmi_cpu_shutdown() 385 apic_write(APIC_LVTPC, per_cpu(saved_lvtpc, cpu)); in nmi_cpu_shutdown() 386 apic_write(APIC_LVTERR, v); in nmi_cpu_shutdown()
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D | op_model_ppro.c | 145 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); in ppro_check_ctrs()
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D | op_model_p4.c | 661 apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); in p4_check_ctrs()
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/arch/x86/kernel/ |
D | smpboot.c | 495 apic_write(APIC_ESR, 0); in wakeup_secondary_cpu_via_nmi() 521 apic_write(APIC_ESR, 0); in wakeup_secondary_cpu_via_init() 579 apic_write(APIC_ESR, 0); in wakeup_secondary_cpu_via_init() 608 apic_write(APIC_ESR, 0); in wakeup_secondary_cpu_via_init() 740 apic_write(APIC_ESR, 0); in do_boot_cpu()
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/arch/x86/platform/visws/ |
D | visws_quirks.c | 448 apic_write(APIC_EOI, APIC_EIO_ACK); in ack_cobalt_irq()
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/arch/x86/kernel/cpu/ |
D | perf_event.c | 1201 apic_write(APIC_LVTPC, APIC_DM_NMI); in x86_pmu_handle_irq() 1248 apic_write(APIC_LVTPC, APIC_DM_NMI); in perf_events_lapic_init()
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D | perf_event_p4.c | 1058 apic_write(APIC_LVTPC, APIC_DM_NMI); in p4_pmu_handle_irq()
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D | perf_event_intel.c | 1048 apic_write(APIC_LVTPC, APIC_DM_NMI); in intel_pmu_handle_irq()
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