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Searched refs:arr (Results 1 – 4 of 4) sorted by relevance

/arch/x86/kernel/cpu/mtrr/
Dcyrix.c16 unsigned char arr, ccr3, rcr, shift; in cyrix_get_arr() local
19 arr = CX86_ARR_BASE + (reg << 1) + reg; /* avoid multiplication by 3 */ in cyrix_get_arr()
25 ((unsigned char *)base)[3] = getCx86(arr); in cyrix_get_arr()
26 ((unsigned char *)base)[2] = getCx86(arr + 1); in cyrix_get_arr()
27 ((unsigned char *)base)[1] = getCx86(arr + 2); in cyrix_get_arr()
180 unsigned char arr, arr_type, arr_size; in cyrix_set_arr() local
182 arr = CX86_ARR_BASE + (reg << 1) + reg; /* avoid multiplication by 3 */ in cyrix_set_arr()
227 setCx86(arr + 0, ((unsigned char *)&base)[3]); in cyrix_set_arr()
228 setCx86(arr + 1, ((unsigned char *)&base)[2]); in cyrix_set_arr()
229 setCx86(arr + 2, (((unsigned char *)&base)[1]) | arr_size); in cyrix_set_arr()
/arch/arm/mach-tegra/include/mach/
Duncompress.h35 #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0])) argument
/arch/x86/kernel/cpu/
Dperf_event_intel.c1380 struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs; in intel_guest_get_msrs() local
1382 arr[0].msr = MSR_CORE_PERF_GLOBAL_CTRL; in intel_guest_get_msrs()
1383 arr[0].host = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask; in intel_guest_get_msrs()
1384 arr[0].guest = x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_host_mask; in intel_guest_get_msrs()
1387 return arr; in intel_guest_get_msrs()
1393 struct perf_guest_switch_msr *arr = cpuc->guest_switch_msrs; in core_guest_get_msrs() local
1399 arr[idx].msr = x86_pmu_config_addr(idx); in core_guest_get_msrs()
1400 arr[idx].host = arr[idx].guest = 0; in core_guest_get_msrs()
1405 arr[idx].host = arr[idx].guest = in core_guest_get_msrs()
1409 arr[idx].host &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in core_guest_get_msrs()
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/arch/x86/tools/
Dgen-insn-attr-x86.awk108 function array_size(arr, i,c) {
110 for (i in arr)