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Searched refs:b1 (Results 1 – 25 of 40) sorted by relevance

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/arch/c6x/lib/
Ddivremu.S36 [b1] lmbd .l2 1, B4, B1
37 ||[!b1] b .s2 B3 ; RETURN A
38 ||[!b1] mvk .d2 1, B4
40 ||[!b1] zero .s1 A5
52 || [b1] subc .l1x A4,B4,A4
53 || [b1] add .s2 -1, B1, B1
54 [b1] subc .l1x A4,B4,A4
55 || [b1] add .s2 -1, B1, B1
60 || [b1] subc .l1x A4,B4,A4
61 || [b1] add .s2 -1, B1, B1
[all …]
/arch/arm/include/asm/
Dxor.h26 : "=r" (src), "=r" (b1), "=r" (b2) \
28 __XOR(a1, b1); __XOR(a2, b2);
32 : "=r" (src), "=r" (b1), "=r" (b2), "=r" (b3), "=r" (b4) \
34 __XOR(a1, b1); __XOR(a2, b2); __XOR(a3, b3); __XOR(a4, b4)
54 register unsigned int b1 __asm__("r8"); in xor_arm4regs_2()
75 register unsigned int b1 __asm__("r8"); in xor_arm4regs_3()
95 register unsigned int b1 __asm__("ip"); in xor_arm4regs_4()
114 register unsigned int b1 __asm__("ip"); in xor_arm4regs_5()
/arch/arm/nwfpe/
Dsoftfloat-macros339 value formed by concatenating `b0' and `b1'. Addition is modulo 2^128, so
346 bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
350 z1 = a1 + b1;
359 192-bit value formed by concatenating `b0', `b1', and `b2'. Addition is
371 bits64 b1,
383 z1 = a1 + b1;
397 Subtracts the 128-bit value formed by concatenating `b0' and `b1' from the
406 bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 *z0Ptr, bits64 *z1Ptr )
409 *z1Ptr = a1 - b1;
410 *z0Ptr = a0 - b0 - ( a1 < b1 );
[all …]
/arch/arm/common/
Duengine.c307 u8 b1; in generate_ucode() local
312 b1 = (gpr_a[i] >> 8) & 0xff; in generate_ucode()
318 ucode[offset++] = (b1 >> 4); in generate_ucode()
319 ucode[offset++] = (b1 << 4) | 0x0c | (b0 >> 6); in generate_ucode()
335 u8 b1; in generate_ucode() local
340 b1 = (gpr_b[i] >> 8) & 0xff; in generate_ucode()
346 ucode[offset++] = (b1 >> 4); in generate_ucode()
347 ucode[offset++] = (b1 << 4) | 0x02 | (i >> 6); in generate_ucode()
/arch/x86/net/
Dbpf_jit_comp.c53 #define EMIT1(b1) EMIT(b1, 1) argument
54 #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2) argument
55 #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3) argument
56 #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4) argument
57 #define EMIT1_off32(b1, off) do { EMIT1(b1); EMIT(off, 4);} while (0) argument
/arch/x86/crypto/
Dghash-clmulni-intel_asm.S62 PCLMULQDQ 0x11 SHASH T1 # T1 = a1 * b1
63 PCLMULQDQ 0x00 T3 T2 # T2 = (a1 + a0) * (b1 + b0)
65 pxor T1, T2 # T2 = a0 * b1 + a1 * b0
Daesni-intel_asm.S150 pxor \HK, \TMP3 # TMP3 = b1+b0
151 PCLMULQDQ 0x11, \HK, \TMP1 # TMP1 = a1*b1
153 PCLMULQDQ 0x00, \TMP3, \TMP2 # TMP2 = (a0+a1)*(b1+b0)
689 PCLMULQDQ 0x11, \TMP5, \TMP4 # TMP4 = a1*b1
708 PCLMULQDQ 0x00, \TMP5, \TMP6 # TMP6 = (a1+a0)*(b1+b0)
723 PCLMULQDQ 0x11, \TMP5, \TMP1 # TMP1 = a1 * b1
736 PCLMULQDQ 0x00, \TMP5, \TMP2 # TMP2 = (a1+a0)*(b1+b0)
753 PCLMULQDQ 0x11, \TMP5, \TMP1 # TMP1 = a1*b1
766 PCLMULQDQ 0x00, \TMP5, \TMP2 # TMP2 = (a1+a0)*(b1+b0)
784 PCLMULQDQ 0x11, \TMP5, \TMP1 # TMP1 = a1*b1
[all …]
/arch/ia64/kernel/
Dmodule.c245 uint64_t b0, b1, *b = (uint64_t *) plt->bundle[1]; in plt_target() local
248 b0 = b[0]; b1 = b[1]; in plt_target()
249 off = ( ((b1 & 0x00fffff000000000UL) >> 36) /* imm20b -> bit 0 */ in plt_target()
250 | ((b0 >> 48) << 20) | ((b1 & 0x7fffffUL) << 36) /* imm39 -> bit 20 */ in plt_target()
251 | ((b1 & 0x0800000000000000UL) << 0)); /* i -> bit 59 */ in plt_target()
294 uint64_t b0, b1, *b = (uint64_t *) plt->bundle[0]; in plt_target() local
296 b0 = b[0]; b1 = b[1]; in plt_target()
297 return ( ((b1 & 0x000007f000000000) >> 36) /* imm7b -> bit 0 */ in plt_target()
298 | ((b1 & 0x07fc000000000000) >> 43) /* imm9d -> bit 7 */ in plt_target()
299 | ((b1 & 0x0003e00000000000) >> 29) /* imm5c -> bit 16 */ in plt_target()
[all …]
Dpatch.c47 u64 m0, m1, v0, v1, b0, b1, *b = (u64 *) (insn_addr & -16); in ia64_patch() local
51 b0 = b[0]; b1 = b[1]; in ia64_patch()
61 b[1] = (b1 & ~m1) | (v1 & m1); in ia64_patch()
Dentry.h56 .spillsp b0,SW(B0)+16+(off); .spillsp b1,SW(B1)+16+(off); \
Dhead.S109 SAVE_FROM_REG(b1,_reg1,_reg2);; \
410 (p7) mov b1=r9
413 (p7) br.call.sptk.many rp=b1
1123 SET_REG(b1);
1144 mov b1=r18 // Return location
1165 RESTORE_REG(b1, r25, r17);;
/arch/blackfin/include/asm/
Dcontext.S43 [--sp] = b1;
115 [--sp] = b1;
174 [--sp] = b1;
253 b1 = [sp++]; define
323 b1 = [sp++]; define
Dptrace.h55 long b1; member
/arch/alpha/include/asm/
Dbitops.h447 unsigned long b0, b1, ofs, tmp; in sched_find_first_bit() local
450 b1 = b[1]; in sched_find_first_bit()
452 tmp = (b0 ? b0 : b1); in sched_find_first_bit()
/arch/sh/kernel/cpu/sh4/
Dsoftfloat.c90 void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
92 void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
638 void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, in add128() argument
643 z1 = a1 + b1; in add128()
649 sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr, in sub128() argument
652 *z1Ptr = a1 - b1; in sub128()
653 *z0Ptr = a0 - b0 - (a1 < b1); in sub128()
658 bits64 b0, b1; in estimateDiv128To64() local
672 b1 = b << 32; in estimateDiv128To64()
673 add128(rem0, rem1, b0, b1, &rem0, &rem1); in estimateDiv128To64()
/arch/mips/pmc-sierra/yosemite/
Dht.c117 unsigned char b1, b2, b3, b4; in longswap() local
119 b1 = l&255; in longswap()
124 return ((b1<<24) + (b2<<16) + (b3<<8) + b4); in longswap()
/arch/c6x/kernel/
Dsignal.c49 COPY(b0); COPY(b1); COPY(b2); COPY(b3); COPY(b5); COPY(b7); COPY(b9); in restore_sigcontext()
112 COPY(b0); COPY(b1); COPY(b2); COPY(b3); COPY(b5); COPY(b7); COPY(b9); in setup_sigcontext()
Dasm-offsets.c67 OFFSET(REGS_B1, pt_regs, b1); in foo()
/arch/c6x/include/asm/
Dptrace.h128 REG_PAIR(b1, b0);
/arch/ia64/include/asm/
Dptrace.h217 unsigned long b1; member
/arch/blackfin/kernel/
Dsignal.c76 RESTORE(b0); RESTORE(b1); RESTORE(b2); RESTORE(b3); in rt_restore_sigcontext()
141 SETUP(b0); SETUP(b1); SETUP(b2); SETUP(b3); in rt_setup_sigcontext()
Dkgdb.c40 gdb_regs[BFIN_B1] = regs->b1; in pt_regs_to_gdb_regs()
116 regs->b1 = gdb_regs[BFIN_B1]; in gdb_regs_to_pt_regs()
Dasm-offsets.c80 DEFINE(PT_B1, offsetof(struct pt_regs, b1)); in main()
/arch/blackfin/mach-common/
Dinterrupt.S57 [--sp] = b1;
/arch/x86/kernel/
Dkprobes.c70 #define W(row, b0, b1, b2, b3, b4, b5, b6, b7, b8, b9, ba, bb, bc, bd, be, bf)\ argument
71 (((b0##UL << 0x0)|(b1##UL << 0x1)|(b2##UL << 0x2)|(b3##UL << 0x3) | \

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