| /arch/x86/include/asm/ |
| D | cpufeature.h | 219 #define test_cpu_cap(c, bit) \ argument
220 test_bit(bit, (unsigned long *)((c)->x86_capability))
222 #define REQUIRED_MASK_BIT_SET(bit) \ argument
223 ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \
224 (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1)) || \
225 (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2)) || \
226 (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \
227 (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \
228 (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \
229 (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \
[all …]
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| /arch/sh/boards/mach-x3proto/ |
| D | ilsel.c | 49 static inline unsigned int ilsel_offset(unsigned int bit) in ilsel_offset() argument
51 return ILSEL_LEVELS - bit - 1; in ilsel_offset()
54 static inline unsigned long mk_ilsel_addr(unsigned int bit) in mk_ilsel_addr() argument
56 return ILSEL_BASE + ((ilsel_offset(bit) >> 1) & ~0x1); in mk_ilsel_addr()
59 static inline unsigned int mk_ilsel_shift(unsigned int bit) in mk_ilsel_shift() argument
61 return (ilsel_offset(bit) & 0x3) << 2; in mk_ilsel_shift()
64 static void __ilsel_enable(ilsel_source_t set, unsigned int bit) in __ilsel_enable() argument
71 addr = mk_ilsel_addr(bit); in __ilsel_enable()
72 shift = mk_ilsel_shift(bit); in __ilsel_enable()
75 __func__, bit, addr, shift, set); in __ilsel_enable()
[all …]
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| /arch/s390/include/asm/ |
| D | ctl_reg.h | 48 #define __ctl_set_bit(cr, bit) ({ \ argument
51 __dummy |= 1UL << (bit); \
55 #define __ctl_clear_bit(cr, bit) ({ \ argument
58 __dummy &= ~(1UL << (bit)); \
64 extern void smp_ctl_set_bit(int cr, int bit);
65 extern void smp_ctl_clear_bit(int cr, int bit);
66 #define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit) argument
67 #define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit) argument
71 #define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit) argument
72 #define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit) argument
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| /arch/alpha/kernel/ |
| D | sys_sable.c | 42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
93 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
97 if (bit >= 16) { in sable_update_irq_hw()
100 } else if (bit >= 8) { in sable_update_irq_hw()
109 sable_ack_irq_hw(unsigned long bit) in sable_ack_irq_hw() argument
113 if (bit >= 16) { in sable_ack_irq_hw()
115 val1 = 0xE0 | (bit - 16); in sable_ack_irq_hw()
117 } else if (bit >= 8) { in sable_ack_irq_hw()
119 val1 = 0xE0 | (bit - 8); in sable_ack_irq_hw()
[all …]
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| /arch/arm/mach-pnx4008/ |
| D | gpio.c | 54 u32 bit, val; in gpio_read_bit() local
60 bit = GPIO_BIT(gpio); in gpio_read_bit()
61 if (bit) { in gpio_read_bit()
63 ret = (val & bit) ? 1 : 0; in gpio_read_bit()
71 u32 bit, val; in gpio_set_bit() local
77 bit = GPIO_BIT(gpio); in gpio_set_bit()
78 if (bit) { in gpio_set_bit()
80 val |= bit; in gpio_set_bit()
121 unsigned long bit = GPIO_BIT(pin); in pnx4008_gpio_register_pin() local
127 if (access_map[GPIO_INDEX] & bit) in pnx4008_gpio_register_pin()
[all …]
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| D | sleep.S | 48 @ clear SDRAM self-refresh bit latch
50 @ clear SDRAM self-refresh bit
54 @ do save current bit settings in r1
57 @ set SDRAM self-refresh bit
61 @ set SDRAM self-refresh bit latch
65 @ clear SDRAM self-refresh bit latch
69 @ clear SDRAM self-refresh bit
132 @ clear SDRAM self-refresh bit latch
134 @ clear SDRAM self-refresh bit
138 @ do save current bit settings in r1
[all …]
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| /arch/mips/include/asm/ |
| D | bitops.h | 61 unsigned short bit = nr & SZLONG_MASK; in set_bit() local
73 : "ir" (1UL << bit), "m" (*m)); in set_bit()
75 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { in set_bit()
82 : "ir" (bit), "r" (~0)); in set_bit()
94 : "ir" (1UL << bit)); in set_bit()
102 mask = 1UL << bit; in set_bit()
122 unsigned short bit = nr & SZLONG_MASK; in clear_bit() local
134 : "ir" (~(1UL << bit))); in clear_bit()
136 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { in clear_bit()
143 : "ir" (bit)); in clear_bit()
[all …]
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| /arch/powerpc/sysdev/ |
| D | ipic.c | 42 .bit = 16,
49 .bit = 17,
56 .bit = 18,
63 .bit = 19,
70 .bit = 20,
77 .bit = 21,
84 .bit = 22,
91 .bit = 23,
98 .bit = 24,
105 .bit = 25,
[all …]
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| D | cpm2_pic.c | 82 int bit, word; in cpm2_mask_irq() local
85 bit = irq_to_siubit[irq_nr]; in cpm2_mask_irq()
88 ppc_cached_irq_mask[word] &= ~(1 << bit); in cpm2_mask_irq()
94 int bit, word; in cpm2_unmask_irq() local
97 bit = irq_to_siubit[irq_nr]; in cpm2_unmask_irq()
100 ppc_cached_irq_mask[word] |= 1 << bit; in cpm2_unmask_irq()
106 int bit, word; in cpm2_ack() local
109 bit = irq_to_siubit[irq_nr]; in cpm2_ack()
112 out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit); in cpm2_ack()
117 int bit, word; in cpm2_end_irq() local
[all …]
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| /arch/m68k/math-emu/ |
| D | fp_emu.h | 52 #define fp_set_sr(bit) ({ \ argument
53 FPDATA->fpsr |= 1 << (bit); \
132 .macro fp_set_sr bit
133 bset #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
136 .macro fp_clr_sr bit
137 bclr #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
140 .macro fp_tst_sr bit
141 btst #(\bit&7),(FPD_FPSR+3-(\bit/8),FPDATA)
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| /arch/mips/alchemy/common/ |
| D | irq.c | 290 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; in au1x_ic0_unmask() local
293 __raw_writel(1 << bit, base + IC_MASKSET); in au1x_ic0_unmask()
294 __raw_writel(1 << bit, base + IC_WAKESET); in au1x_ic0_unmask()
300 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; in au1x_ic1_unmask() local
303 __raw_writel(1 << bit, base + IC_MASKSET); in au1x_ic1_unmask()
304 __raw_writel(1 << bit, base + IC_WAKESET); in au1x_ic1_unmask()
310 unsigned int bit = d->irq - AU1000_INTC0_INT_BASE; in au1x_ic0_mask() local
313 __raw_writel(1 << bit, base + IC_MASKCLR); in au1x_ic0_mask()
314 __raw_writel(1 << bit, base + IC_WAKECLR); in au1x_ic0_mask()
320 unsigned int bit = d->irq - AU1000_INTC1_INT_BASE; in au1x_ic1_mask() local
[all …]
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| /arch/frv/include/asm/ |
| D | bitops.h | 256 int bit; \
263 : "=&r"(bit) \
268 bit; \
286 int bit, x, y; in fls64() local
304 : "=&r"(bit), "=r"(x), "=r"(y) in fls64()
308 return bit; in fls64()
338 int bit; in __ffs() local
339 asm("scan %1,gr0,%0" : "=r"(bit) : "r"(x & -x)); in __ffs()
340 return 31 - bit; in __ffs()
351 unsigned long bit; in __fls() local
[all …]
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| D | math-emu.h | 108 #define dprint(bit, fmt, args...) ({ \ argument
109 if (fp_debugprint & (1 << (bit))) \
113 #define dprint(bit, fmt, args...) argument
237 .macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5
245 .if \bit+1
247 moveq #\bit,%d0
249 btst %d0,fp_debugprint+((31-\bit)/8)
251 btst #\bit,fp_debugprint+((31-\bit)/8)
264 .macro printx bit,fp
273 .Lx1\@: printf \bit," %c",1,%d0
[all …]
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| /arch/arm/include/asm/ |
| D | bitops.h | 37 static inline void ____atomic_set_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_set_bit() argument
40 unsigned long mask = 1UL << (bit & 31); in ____atomic_set_bit()
42 p += bit >> 5; in ____atomic_set_bit()
49 static inline void ____atomic_clear_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_clear_bit() argument
52 unsigned long mask = 1UL << (bit & 31); in ____atomic_clear_bit()
54 p += bit >> 5; in ____atomic_clear_bit()
61 static inline void ____atomic_change_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_change_bit() argument
64 unsigned long mask = 1UL << (bit & 31); in ____atomic_change_bit()
66 p += bit >> 5; in ____atomic_change_bit()
74 ____atomic_test_and_set_bit(unsigned int bit, volatile unsigned long *p) in ____atomic_test_and_set_bit() argument
[all …]
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| /arch/mips/include/asm/mach-ar7/ |
| D | ar7.h | 167 static inline void ar7_device_enable(u32 bit) in ar7_device_enable() argument
171 writel(readl(reset_reg) | (1 << bit), reset_reg); in ar7_device_enable()
175 static inline void ar7_device_disable(u32 bit) in ar7_device_disable() argument
179 writel(readl(reset_reg) & ~(1 << bit), reset_reg); in ar7_device_disable()
183 static inline void ar7_device_reset(u32 bit) in ar7_device_reset() argument
185 ar7_device_disable(bit); in ar7_device_reset()
186 ar7_device_enable(bit); in ar7_device_reset()
189 static inline void ar7_device_on(u32 bit) in ar7_device_on() argument
192 writel(readl(power_reg) | (1 << bit), power_reg); in ar7_device_on()
196 static inline void ar7_device_off(u32 bit) in ar7_device_off() argument
[all …]
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| /arch/mips/cavium-octeon/ |
| D | octeon-irq.c | 30 unsigned int bit:6; member
38 u8 bit; member
45 static void __init octeon_irq_set_ciu_mapping(int irq, int line, int bit, in octeon_irq_set_ciu_mapping() argument
55 cd.s.bit = bit; in octeon_irq_set_ciu_mapping()
58 octeon_irq_ciu_to_irq[line][bit] = irq; in octeon_irq_set_ciu_mapping()
82 unsigned int bit = cd->bit; in octeon_irq_core_ack() local
89 clear_c0_status(0x100 << bit); in octeon_irq_core_ack()
91 if (bit < 2) in octeon_irq_core_ack()
92 clear_c0_cause(0x100 << bit); in octeon_irq_core_ack()
104 set_c0_status(0x100 << cd->bit); in octeon_irq_core_eoi()
[all …]
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| /arch/ia64/include/asm/ |
| D | bitops.h | 40 __u32 bit, old, new; in set_bit() local
45 bit = 1 << (nr & 31); in set_bit()
49 new = old | bit; in set_bit()
168 __u32 bit, old, new; in change_bit() local
173 bit = (1 << (nr & 31)); in change_bit()
177 new = old ^ bit; in change_bit()
207 __u32 bit, old, new; in test_and_set_bit() local
212 bit = 1 << (nr & 31); in test_and_set_bit()
216 new = old | bit; in test_and_set_bit()
218 return (old & bit) != 0; in test_and_set_bit()
[all …]
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| /arch/mips/loongson/common/ |
| D | mem.c | 26 int bit; in prom_init_memory() local
28 bit = fls(memsize + highmemsize); in prom_init_memory()
29 if (bit != ffs(memsize + highmemsize)) in prom_init_memory()
30 bit += 20; in prom_init_memory()
32 bit = bit + 20 - 1; in prom_init_memory()
36 0x80000000ul, (1 << bit)); in prom_init_memory()
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| /arch/powerpc/platforms/512x/ |
| D | clock.c | 47 int reg, bit; /* CLK_HAS_CTRL */ member
92 pr_cont(" reg/bit=%d/%d", p->reg, p->bit); in dump_clocks()
131 mask |= 1 << clk->bit; in mpc5121_clk_enable()
143 mask &= ~(1 << clk->bit); in mpc5121_clk_disable()
356 .bit = 30,
366 .bit = 29,
376 .bit = 28,
390 .bit = 14,
399 .bit = 13,
408 .bit = 11,
[all …]
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| /arch/mips/include/asm/mach-au1x00/ |
| D | gpio-au1300.h | 31 int bit; in au1300_gpio_get_value() local
35 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_get_value()
36 return __raw_readl(roff + AU1300_GPIC_PINVAL) & bit; in au1300_gpio_get_value()
42 unsigned long bit; in au1300_gpio_direction_input() local
47 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_direction_input()
48 __raw_writel(bit, roff + AU1300_GPIC_DEVCLR); in au1300_gpio_direction_input()
57 unsigned long bit; in au1300_gpio_set_value() local
62 bit = GPIC_GPIO_TO_BIT(gpio); in au1300_gpio_set_value()
63 __raw_writel(bit, roff + (v ? AU1300_GPIC_PINVAL in au1300_gpio_set_value()
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| /arch/arm/lib/ |
| D | findbit.S | 33 bne .L_found @ any now set - found zero bit
34 add r2, r2, #8 @ next bit pointer
53 eor r3, r3, #0xff @ now looking for a 1 bit
57 add r2, r2, #1 @ align bit pointer
58 b 2b @ loop for next bit
74 bne .L_found @ any now set - found zero bit
75 add r2, r2, #8 @ next bit pointer
97 add r2, r2, #1 @ align bit pointer
98 b 2b @ loop for next bit
112 bne .L_found @ any now set - found zero bit
[all …]
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| /arch/m68k/include/asm/ |
| D | math-emu.h | 108 #define dprint(bit, fmt, args...) ({ \ argument
109 if (fp_debugprint & (1 << (bit))) \
113 #define dprint(bit, fmt, args...) argument
252 .macro printf bit=-1,string,nr=0,arg1,arg2,arg3,arg4,arg5
260 .if \bit+1
262 moveq #\bit,%d0
264 btst %d0,fp_debugprint+((31-\bit)/8)
266 btst #\bit,fp_debugprint+((31-\bit)/8)
279 .macro printx bit,fp
288 .Lx1\@: printf \bit," %c",1,%d0
[all …]
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| /arch/m68k/ifpsp060/ |
| D | CHANGES | 38 Inexact FPSR bit. Emulation now does not set Inexact for
86 bit 27 = 1 (misaligned bit)
87 bit 24 = 1 (read)
88 bit 23 = 0 (write)
89 bit 22:21 = 10 (SIZE = word)
90 bit 20:19 = 00 (TT)
91 bit 18:16 = x10 (TM; x = 1 for supervisor mode)
92 bit 15 = 1 (IO)
93 bit 0 = 1 (Software Emulation Error)
97 stated that ONLY "bit 0" would be set. The 060SP attempts to set a few
[all …]
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| /arch/unicore32/lib/ |
| D | findbit.S | 26 bne .L_found @ any now set - found zero bit
27 add r2, r2, #8 @ next bit pointer
45 xor r3, r3, #0xff @ now looking for a 1 bit
49 add r2, r2, #1 @ align bit pointer
50 b 2b @ loop for next bit
64 bne .L_found @ any now set - found zero bit
65 add r2, r2, #8 @ next bit pointer
86 add r2, r2, #1 @ align bit pointer
87 b 2b @ loop for next bit
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| /arch/powerpc/platforms/pasemi/ |
| D | dma_lib.c | 115 int bit; in pasemi_alloc_tx_chan() local
133 bit = find_next_bit(txch_free, MAX_TXCH, start); in pasemi_alloc_tx_chan()
134 if (bit >= limit) in pasemi_alloc_tx_chan()
136 if (!test_and_clear_bit(bit, txch_free)) in pasemi_alloc_tx_chan()
139 return bit; in pasemi_alloc_tx_chan()
150 int bit; in pasemi_alloc_rx_chan() local
152 bit = find_first_bit(rxch_free, MAX_RXCH); in pasemi_alloc_rx_chan()
153 if (bit >= MAX_TXCH) in pasemi_alloc_rx_chan()
155 if (!test_and_clear_bit(bit, rxch_free)) in pasemi_alloc_rx_chan()
158 return bit; in pasemi_alloc_rx_chan()
[all …]
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