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Searched refs:chipcHw_REG_DDR_PHASE_VALUE_GE_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-bcmring/include/mach/csp/
DchipcHw_inline.h1411 chipcHw_REG_DDR_PHASE_VALUE_GE_SHIFT) in chipcHw_setDdrHwPhaseAlignMargin()
1416 ((ge << chipcHw_REG_DDR_PHASE_VALUE_GE_SHIFT) in chipcHw_setDdrHwPhaseAlignMargin()
DchipcHw_reg.h476 #define chipcHw_REG_DDR_PHASE_VALUE_GE_SHIFT 23 macro