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Searched refs:chipcHw_REG_PLL_CLOCK_MDIV_MASK (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-bcmring/csp/chipc/
DchipcHw.c202 …n chipcHw_divide(vcoHz, ((*pPLLReg & chipcHw_REG_PLL_CLOCK_MDIV_MASK) ? (*pPLLReg & chipcHw_REG_PL… in chipcHw_getClockFrequency()
221 div = *pDependentClock & chipcHw_REG_PLL_CLOCK_MDIV_MASK; in chipcHw_getClockFrequency()
441 reg32_modify_and(pPLLReg, ~(chipcHw_REG_PLL_CLOCK_MDIV_MASK)); in chipcHw_setClockFrequency()
444 …hipcHw_divide(vcoHz, ((*(pPLLReg) & chipcHw_REG_PLL_CLOCK_MDIV_MASK) ? (*(pPLLReg) & chipcHw_REG_P… in chipcHw_setClockFrequency()
463 …chipcHw_divide(chipcHw_divide (desVcoHz, (*pDependentClock & chipcHw_REG_PLL_CLOCK_MDIV_MASK)), fr… in chipcHw_setClockFrequency()
/arch/arm/mach-bcmring/include/mach/csp/
DchipcHw_reg.h167 #define chipcHw_REG_PLL_CLOCK_MDIV_MASK 0x000000FF /* Clock post divider mask macro