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Searched refs:chipcHw_REG_PLL_CLOCK_POWER_DOWN (Results 1 – 2 of 2) sorted by relevance

/arch/arm/mach-bcmring/include/mach/csp/
DchipcHw_inline.h883 ~chipcHw_REG_PLL_CLOCK_POWER_DOWN); in chipcHw_setClock()
886 chipcHw_REG_PLL_CLOCK_POWER_DOWN); in chipcHw_setClock()
895 ~chipcHw_REG_PLL_CLOCK_POWER_DOWN); in chipcHw_setClock()
898 chipcHw_REG_PLL_CLOCK_POWER_DOWN); in chipcHw_setClock()
907 ~chipcHw_REG_PLL_CLOCK_POWER_DOWN); in chipcHw_setClock()
910 chipcHw_REG_PLL_CLOCK_POWER_DOWN); in chipcHw_setClock()
DchipcHw_reg.h160 #define chipcHw_REG_PLL_CLOCK_POWER_DOWN 0x00080000 /* PLL channel power down */ macro