Searched refs:chipcHw_REG_PLL_PREDIVIDER_P1 (Results 1 – 3 of 3) sorted by relevance
84 (chipcHw_REG_PLL_PREDIVIDER_P1 << in chipcHw_pll2Enable()169 (chipcHw_REG_PLL_PREDIVIDER_P1 << in chipcHw_pll1Enable()178 (chipcHw_REG_PLL_PREDIVIDER_P1 << in chipcHw_pll1Enable()
77 chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) * in chipcHw_getClockFrequency()84 …chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, (chipcHw_REG_PLL_PREDIVIDER_P2 * (uint64_t) chipcHw_… in chipcHw_getClockFrequency()88 chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) * in chipcHw_getClockFrequency()94 chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) * in chipcHw_getClockFrequency()279 chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) * in chipcHw_setClockFrequency()286 …chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, (chipcHw_REG_PLL_PREDIVIDER_P2 * (uint64_t) chipcHw_… in chipcHw_setClockFrequency()291 chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) * in chipcHw_setClockFrequency()296 chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_PLL_PREDIVIDER_P2) * in chipcHw_setClockFrequency()300 …vcoFreqPll2Hz = chipcHw_XTAL_FREQ_Hz * chipcHw_divide(chipcHw_REG_PLL_PREDIVIDER_P1, chipcHw_REG_P… in chipcHw_setClockFrequency()
203 #define chipcHw_REG_PLL_PREDIVIDER_P1 1 macro