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Searched refs:clear (Results 1 – 25 of 196) sorted by relevance

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/arch/powerpc/math-emu/
Dmcrfs.c11 u32 value, clear; in mcrfs() local
17 clear = 15 << ((7 - crfS) << 2); in mcrfs()
19 clear = 0x90000000; in mcrfs()
22 __FPU_FPSCR &= ~(clear); in mcrfs()
/arch/mips/emma/markeins/
Dled.c23 const unsigned long clear = 0x20202020; variable
29 emma2rh_out32(LED_BASE, clear); in markeins_led_clear()
30 emma2rh_out32(LED_BASE + 4, clear); in markeins_led_clear()
/arch/arm/mach-pnx4008/
Dsleep.S48 @ clear SDRAM self-refresh bit latch
50 @ clear SDRAM self-refresh bit
65 @ clear SDRAM self-refresh bit latch
69 @ clear SDRAM self-refresh bit
98 @ clear STOP mode and SDRAM self-refresh bits
132 @ clear SDRAM self-refresh bit latch
134 @ clear SDRAM self-refresh bit
149 @ clear SDRAM self-refresh bit latch
153 @ clear SDRAM self-refresh bit
172 @ clear SDRAM self-refresh bit latch
/arch/arm/mach-sa1100/
Dhackkit.c112 u_int set = 0, clear = 0; in hackkit_set_mctrl()
117 clear |= PT_CTRL2_RS1_RTS; in hackkit_set_mctrl()
122 clear |= PT_CTRL2_RS1_DTR; in hackkit_set_mctrl()
124 PTCTRL2_clear(clear); in hackkit_set_mctrl()
Dsleep.S119 @ Step 1 clear RT field of all MSCx registers
124 @ Step 2 clear DRI field in MDREFR
130 @ Step 4 clear DE bis in MDCNFG
133 @ Step 5 clear DRAM refresh control register
/arch/alpha/lib/
Dstrncpy.S36 or $3, $24, $3 # clear the bits between the last
46 subq $27, 1, $2 # clear the final bits in the prev word
72 1: ldq_u $1, 0($16) # clear the leading bits in the final word
/arch/m68k/fpsp040/
Dx_unsupp.S67 andl #0xFF00FF,%d1 |clear all but aexcs and qbyte
70 andl #0x0FFF40FF,%d1 |clear all but cc's, snan bit, aexcs, and qbyte
Dx_unimp.S56 | exception byte and condition codes are clear before proceeding
59 andl #0xFF00FF,%d0 |clear all but accrued exceptions
61 fmovel #0,%FPSR |clear all user bits
62 fmovel #0,%FPCR |clear all user exceptions for FPSP
/arch/arm/mach-tegra/
Dsleep.S81 str r3, [r0, r2] @ clear event & interrupt status
87 str r3, [r0, r1] @ clear flow controller halt status
89 str r3, [r0, r2] @ clear event & interrupt status
/arch/powerpc/include/asm/
Dio.h774 #define clrsetbits(type, addr, clear, set) \ argument
775 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
778 #define clrsetbits_be64(addr, clear, set) clrsetbits(be64, addr, clear, set) argument
779 #define clrsetbits_le64(addr, clear, set) clrsetbits(le64, addr, clear, set) argument
782 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set) argument
783 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set) argument
785 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set) argument
786 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set) argument
788 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set) argument
/arch/mips/include/asm/
Dhugetlb.h62 pte_t clear; in huge_ptep_get_and_clear() local
65 pte_val(clear) = (unsigned long)invalid_pte_table; in huge_ptep_get_and_clear()
66 set_pte_at(mm, addr, ptep, clear); in huge_ptep_get_and_clear()
/arch/arm/mach-omap2/
Domap_l3_noc.c62 u32 std_err_main, err_reg, clear, masterid; in l3_interrupt_handler() local
99 clear = std_err_main | CLEAR_STDERR_LOG; in l3_interrupt_handler()
100 writel(clear, l3_targ_base + in l3_interrupt_handler()
115 clear = std_err_main | CLEAR_STDERR_LOG; in l3_interrupt_handler()
116 writel(clear, l3_targ_base + in l3_interrupt_handler()
Dsleep24xx.S52 mov r0, #0 @ clear for mcr setup
88 mov r3, #0x0 @ clear for mcr call
104 bic r4, r4, #0x40 @ now clear self refresh bit.
/arch/cris/arch-v32/lib/
Dspinlock.S21 clear.b [$r10]
33 clear.b [$r10]
/arch/mn10300/lib/
D__ucmpdi2.S31 subc a1,d1 # may clear Z, never sets it
37 # C flag is set if LE, clear if GE
/arch/mips/include/asm/mach-lantiq/
Dlantiq.h16 #define ltq_w32_mask(clear, set, reg) \ argument
17 ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)
/arch/arm/kernel/
Dentry-header.S81 strex r1, r2, [sp] @ clear the exclusive monitor
84 clrex @ clear the exclusive monitor
96 strex r1, r2, [sp] @ clear the exclusive monitor
98 clrex @ clear the exclusive monitor
126 clrex @ clear the exclusive monitor
135 clrex @ clear the exclusive monitor
/arch/arm/plat-samsung/include/plat/
Dpm.h145 extern void s3c_pm_debug_smdkled(u32 set, u32 clear);
148 static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { } in s3c_pm_debug_smdkled() argument
/arch/x86/mm/
Dkmmio.c116 static void clear_pmd_presence(pmd_t *pmd, bool clear, pmdval_t *old) in clear_pmd_presence() argument
119 if (clear) { in clear_pmd_presence()
127 static void clear_pte_presence(pte_t *pte, bool clear, pteval_t *old) in clear_pte_presence() argument
130 if (clear) { in clear_pte_presence()
138 static int clear_page_presence(struct kmmio_fault_page *f, bool clear) in clear_page_presence() argument
150 clear_pmd_presence((pmd_t *)pte, clear, &f->old_presence); in clear_page_presence()
153 clear_pte_presence(pte, clear, &f->old_presence); in clear_page_presence()
/arch/mips/lasat/
Dprom.h4 extern void (*prom_display)(const char *string, int pos, int clear);
Dprom.c26 static void null_prom_display(const char *string, int pos, int clear) in null_prom_display() argument
46 void (*prom_display)(const char *string, int pos, int clear) =
/arch/arm/include/asm/
Dtls.h11 mcr p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
21 mcrne p15, 0, \tmp1, c13, c0, 2 @ clear user r/w TLS register
/arch/arm/boot/compressed/
Dhead-xscale.S31 bic r0, r0, #0x05 @ clear DC, MMU
32 bic r0, r0, #0x1000 @ clear Icache
/arch/hexagon/kernel/
Dtime.c69 u32 clear; /* one-shot register that clears the count */ member
92 iowrite32(1, &rtos_timer->clear); in set_next_event()
93 iowrite32(0, &rtos_timer->clear); in set_next_event()
/arch/arm/mm/
Dabort-nommu.S17 mov r0, #0 @ clear r0, r1 (no FSR/FAR)

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