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Searched refs:ddrcReg_CTLR_MEMORY_CFG_PWRDOWN_CYCLES_SHIFT (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-bcmring/include/mach/csp/
DddrcReg.h161 #define ddrcReg_CTLR_MEMORY_CFG_PWRDOWN_CYCLES_SHIFT 7 macro
162 …cReg_CTLR_MEMORY_CFG_PWRDOWN_CYCLES_MASK (0x3f << ddrcReg_CTLR_MEMORY_CFG_PWRDOWN_CYCLES_SHIFT)