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Searched refs:ddrcReg_PHY_ADDR_CTL_PLL_CTL1_LPF_BW_SHIFT (Results 1 – 1 of 1) sorted by relevance

/arch/arm/mach-bcmring/include/mach/csp/
DddrcReg.h502 #define ddrcReg_PHY_ADDR_CTL_PLL_CTL1_LPF_BW_SHIFT 22 macro
503 …ddrcReg_PHY_ADDR_CTL_PLL_CTL1_LPF_BW_MASK (0x3 << ddrcReg_PHY_ADDR_CTL_PLL_CTL1_LPF_BW_SHIFT)