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/arch/mips/mm/
Dcerr-sb1.c180 uint32_t errctl, cerr_i, cerr_d, dpalo, dpahi, eepc, res; in sb1_cache_error() local
209 "=r" (dpahi), "=r" (dpalo), "=r" (eepc)); in sb1_cache_error()
212 printk(" c0_errorepc == %08x\n", eepc); in sb1_cache_error()
220 if (((eepc & SB1_CACHE_INDEX_MASK) != (cerr_i & SB1_CACHE_INDEX_MASK)) && in sb1_cache_error()
221 ((eepc & SB1_CACHE_INDEX_MASK) != ((cerr_i & SB1_CACHE_INDEX_MASK) - 4))) in sb1_cache_error()