Searched refs:exc (Results 1 – 14 of 14) sorted by relevance
/arch/unicore32/kernel/ |
D | fpu-ucf64.c | 81 u32 exc = F64_EXCEPTION_ERROR & fpexc; in ucf64_exchandler() local 86 if (exc & FPSCR_CMPINSTR_BIT) { in ucf64_exchandler() 87 if (exc & FPSCR_CON) in ucf64_exchandler() 91 exc &= ~(FPSCR_CMPINSTR_BIT | FPSCR_CON); in ucf64_exchandler() 110 tmp |= exc; in ucf64_exchandler()
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/arch/powerpc/mm/ |
D | tlb_nohash.c | 507 static void __patch_exception(int exc, unsigned long addr) in __patch_exception() argument 518 patch_branch(ibase + (exc / 4) + 1, addr, 0); in __patch_exception() 521 #define patch_exception(exc, name) do { \ argument 523 __patch_exception((exc), (unsigned long)&name); \
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/arch/m68k/fpsp040/ |
D | gen_except.S | 90 movel USER_FPSR(%a6),FPSR_SHADOW(%a1) |set exc bits 145 movel USER_FPSR(%a6),FPSR_SHADOW(%a6) |set exc bits 154 andb FPSR_EXCEPT(%a6),%d0 |and in the fpsr exc byte 159 | ;based on first enabled exc 210 | the case of the ovfl exc without the ovfl enabled, but with 219 | ;it is an unsupp or unimp exc 350 | the exc taken will be inex2. 362 movel USER_FPSR(%a6),FPSR_SHADOW(%a1) |set exc bits
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D | x_unimp.S | 69 fsave -(%a7) |capture possible exc state
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D | kernel_ex.S | 69 btstb #dz_bit,FPCR_ENABLE(%a6) |test FPCR for dz exc enabled 74 btstb #dz_bit,FPCR_ENABLE(%a6) |test FPCR for dz exc enabled
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D | decbin.S | 439 clrl %d3 |clear d3 to force no exc and extended 500 beqs no_exc |skip this if no exc
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D | do_func.S | 508 bra t_inx2 |set inex2 exc 515 bra t_inx2 |set inex2 exc
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D | scale.S | 50 fmovel #0,%fpcr |clr user enabled exc
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D | x_snan.S | 144 movel EXC_EA(%a6),%a0 |get <ea> from exc frame
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D | bindec.S | 290 | d4: exc picture/LEN
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/arch/mips/include/asm/octeon/ |
D | cvmx-pemx-defs.h | 340 uint64_t exc:1; member 367 uint64_t exc:1; member 394 uint64_t exc:1; member
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/arch/alpha/kernel/ |
D | osf_sys.c | 697 unsigned long exc, swcr, fpcr, fex; in SYSCALL_DEFINE5() local 700 if (get_user(exc, (unsigned long __user *)buffer)) in SYSCALL_DEFINE5() 703 exc &= IEEE_STATUS_MASK; in SYSCALL_DEFINE5() 706 swcr = (*state & IEEE_SW_MASK) | exc; in SYSCALL_DEFINE5() 707 *state |= exc; in SYSCALL_DEFINE5() 716 fex = (exc >> IEEE_STATUS_TO_EXCSUM_SHIFT) & swcr; in SYSCALL_DEFINE5()
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/arch/m68k/ifpsp060/src/ |
D | fpsp.S | 1381 # restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU; 1403 mov.w (tbl_except.b,%pc,%d0.w*2),2+FP_SRC(%a6) # create exc status 1758 # frame or it will get overwritten when the exc stack frame is shifted "down". 1959 # restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU; 2413 # the handler exits through _fpsp_done(). If an enabled exc has been # 3808 # _fpsp_fline(): 060FPSP entry point for "Line F emulator" exc. # 11774 bset &unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit 13493 bset &unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit 13595 bset &unfl_bit,FPSR_EXCEPT(%a6) # set unfl exc bit 13774 mov.b %d0,FPSR_CC(%a6) # set ccode bits(no exc bits are set) [all …]
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D | pfpsp.S | 1380 # restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU; 1402 mov.w (tbl_except.b,%pc,%d0.w*2),2+FP_SRC(%a6) # create exc status 1757 # frame or it will get overwritten when the exc stack frame is shifted "down". 1958 # restore exc state (SNAN||OPERR||OVFL||UNFL||DZ||INEX) into the FPU; 2412 # the handler exits through _fpsp_done(). If an enabled exc has been #
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