| /arch/powerpc/boot/dts/ |
| D | kmeter1.dts | 207 1 14 1 0 1 0 /* TxD0 (PB14, out, f1) */
208 1 15 1 0 1 0 /* TxD1 (PB15, out, f1) */
209 1 20 2 0 1 0 /* RxD0 (PB20, in, f1) */
210 1 21 2 0 1 0 /* RxD1 (PB21, in, f1) */
211 1 18 1 0 1 0 /* TX_EN (PB18, out, f1) */
212 1 26 2 0 1 0 /* RX_DV (PB26, in, f1) */
213 1 27 2 0 1 0 /* RX_ER (PB27, in, f1) */
227 3 0 1 0 1 0 /* TxD0 (PD0, out, f1) */
228 3 1 1 0 1 0 /* TxD1 (PD1, out, f1) */
229 3 6 2 0 1 0 /* RxD0 (PD6, in, f1) */
[all …]
|
| /arch/mips/lasat/image/ |
| D | Makefile | 16 KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ )
17 KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ )
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| /arch/x86/boot/ |
| D | cpucheck.c | 91 u32 f0, f1; in has_eflag() local
103 : "=&r" (f0), "=&r" (f1) in has_eflag()
106 return !!((f0^f1) & mask); in has_eflag()
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| /arch/mips/include/asm/ |
| D | fpregdef.h | 24 #define fv0f $f1
84 #define ft12 $f1
|
| D | asmmacro-64.h | 38 sdc1 $f1, THREAD_FPR1(\thread)
86 ldc1 $f1, THREAD_FPR1(\thread)
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| D | asmmacro-32.h | 39 swc1 $f1, THREAD_FPR1(\thread)
97 lwc1 $f1, THREAD_FPR1(\thread)
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| /arch/arm/mach-omap2/ |
| D | pm24xx.c | 67 u32 f1, f2; in omap2_fclks_active() local
69 f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); in omap2_fclks_active()
72 return (f1 | f2) ? 1 : 0; in omap2_fclks_active()
|
| /arch/powerpc/boot/ |
| D | wrapper | 375 base=0x`${CROSS}nm "$ofile" | grep ' _start$' | cut -d' ' -f1`
419 | cut -d' ' -f1`
423 | cut -d' ' -f1`
|
| /arch/mips/kernel/ |
| D | r2300_fpu.S | 34 EX(swc1 $f1,(SC_FPREGS+8)(a0))
86 EX(lwc1 $f1,(SC_FPREGS+8)(a0))
|
| D | r4k_switch.S | 181 dmtc1 t1, $f1
202 mtc1 t1, $f1
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| D | r2300_switch.S | 139 mtc1 t0, $f1
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| D | r4k_fpu.S | 40 EX sdc1 $f1, SC_FPREGS+8(a0)
119 EX ldc1 $f1, SC_FPREGS+8(a0)
|
| /arch/ia64/lib/ |
| D | idiv32.S | 62 (p6) fnma.s1 f6 = f9, f6, f1 // e0 = -b*y0 + 1
|
| D | idiv64.S | 52 (p6) fnma.s1 f6 = f9, f11, f1 // e0 = -b*y0 + 1
|
| /arch/sparc/lib/ |
| D | U1memcpy.S | 65 #define FREG_FROB(f1, f2, f3, f4, f5, f6, f7, f8, f9) \ argument
66 faligndata %f1, %f2, %f48; \
102 #define FINISH_VISCHUNK(dest, f0, f1, left) \ argument
105 faligndata %f0, %f1, %f48; \
109 #define UNEVEN_VISCHUNK_LAST(dest, f0, f1, left) \ argument
112 fsrc1 %f0, %f1;
114 #define UNEVEN_VISCHUNK(dest, f0, f1, left) \ argument
115 UNEVEN_VISCHUNK_LAST(dest, f0, f1, left) \
|
| /arch/mips/boot/compressed/ |
| D | Makefile | 26 …NTRY=0x$(shell $(NM) $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | grep " kernel_entry" | cut -f1 -d \ )
|
| /arch/xtensa/variants/s6000/include/variant/ |
| D | tie.h | 104 XCHAL_SA_REG(s,0,0,2,0, f1, 4, 4, 4,0x0031, f,1 , 32,0,0,0) \
|
| D | tie-asm.h | 83 SSI f1, \ptr, 12
117 LSI f1, \ptr, 12
|
| /arch/s390/kernel/ |
| D | reipl64.S | 32 std %f1, 0x08 + __LC_FPREGS_SAVE_AREA-SAVE_AREA_BASE(%r1)
|
| /arch/x86/kernel/cpu/ |
| D | common.c | 187 u32 f1, f2; in flag_is_changeable_p() local
207 : "=&r" (f1), "=&r" (f2) in flag_is_changeable_p()
210 return ((f1^f2) & flag) != 0; in flag_is_changeable_p()
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| /arch/sparc/kernel/ |
| D | fpu_traps.S | 250 fitod %f1, %f62
293 fdtos %f62, %f1
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| /arch/arm/mach-tegra/ |
| D | pinmux-tegra20-tables.c | 88 #define PINGROUP(pg_name, vdd, f0, f1, f2, f3, f_safe, \ argument
95 TEGRA_MUX_ ## f1, \
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| /arch/ia64/kvm/ |
| D | vcpu.h | 209 struct { unsigned long qp:6, f1:7, un7:7, r3:7, x:1, hint:2, member
227 struct { unsigned long qp:6, f1:7, f2:7, r3:7, x:1, hint:2, member
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| /arch/alpha/kernel/ |
| D | entry.S | 496 stt $f1, 72($sp)
545 ldt $f1, 72($sp)
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| /arch/sparc/include/asm/ |
| D | hypervisor.h | 1221 unsigned long f1; /* Entry specific */ member
|