/arch/arm/mach-omap1/ |
D | ams-delta-fiq-handler.S | 102 ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask 104 ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status 128 ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask 130 ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits 149 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input 151 ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state 172 data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask 176 ldreq r8, [r9, #BUF_KEY] @ yes - fetch collected so far, 189 ldr r10, [r9, #BUF_GPIO_INT_MASK] @ fetch saved mask
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/arch/m68k/ifpsp060/src/ |
D | isp.S | 886 # (An) - fetch An value from stack # 887 # -(An) - fetch An value from stack; return decr value; # 891 # (An)+ - fetch An value from stack; return value; # 895 # (d16,An) - fetch An value from stack; read d16 using # 896 # _imem_read_word(); fetch may fail -> branch to # 898 # (xxx).w,(xxx).l - use _imem_read_{word,long}() to fetch # 899 # address; fetch may fail # 902 # (d16,PC) - fetch stacked PC value; read d16 using # 903 # _imem_read_word(); fetch may fail -> branch to # 917 mov.w EXC_OPWORD(%a6),%d0 # fetch opcode word [all …]
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D | pfpsp.S | 954 mov.l (tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr 1232 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr 1234 bsr.l _imem_read_long # fetch the instruction words 1322 mov.b FPCR_ENABLE(%a6),%d0 # fetch exceptions set 1327 mov.b 1+EXC_CMDREG(%a6),%d0 # fetch extension 1439 mov.w LOCAL_EX(%a0),%d0 # fetch src exponent 1531 mov.b FPCR_MODE(%a6),%d0 # fetch rnd mode/prec 1843 mov.b FPCR_MODE(%a6),%d0 # fetch rnd mode/prec 1850 mov.l (tbl_unsupp.l,%pc,%d1.l*4),%d1 # fetch routine addr 1867 mov.b FPCR_ENABLE(%a6),%d0 # fetch exceptions enabled [all …]
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D | fplsp.S | 577 bsr.l tag # fetch operand type 634 bsr.l tag # fetch operand type 693 bsr.l tag # fetch operand type 754 bsr.l tag # fetch operand type 811 bsr.l tag # fetch operand type 870 bsr.l tag # fetch operand type 931 bsr.l tag # fetch operand type 988 bsr.l tag # fetch operand type 1047 bsr.l tag # fetch operand type 1108 bsr.l tag # fetch operand type [all …]
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D | fpsp.S | 955 mov.l (tbl_unsupp.l,%pc,%d1.w*4),%d1 # fetch routine addr 1233 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr 1235 bsr.l _imem_read_long # fetch the instruction words 1323 mov.b FPCR_ENABLE(%a6),%d0 # fetch exceptions set 1328 mov.b 1+EXC_CMDREG(%a6),%d0 # fetch extension 1440 mov.w LOCAL_EX(%a0),%d0 # fetch src exponent 1532 mov.b FPCR_MODE(%a6),%d0 # fetch rnd mode/prec 1844 mov.b FPCR_MODE(%a6),%d0 # fetch rnd mode/prec 1851 mov.l (tbl_unsupp.l,%pc,%d1.l*4),%d1 # fetch routine addr 1868 mov.b FPCR_ENABLE(%a6),%d0 # fetch exceptions enabled [all …]
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D | ilsp.S | 134 mov.l 0x8(%a6),%d7 # fetch divisor
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/arch/ia64/lib/ |
D | clear_page.S | 45 .fetch: stf.spill.nta [dst_fetch] = f0, L3_LINE_SIZE label 47 br.cloop.sptk.few .fetch
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/arch/alpha/lib/ |
D | ev6-memcpy.S | 145 ldq $1, 0($17) # L : fetch 8 165 ldbu $1, 0($17) # L : fetch a byte 188 ldbu $1, 0($17) # L : fetch a byte 227 ldbu $1, 0($17) # L : fetch 1
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D | ev6-copy_user.S | 96 EXI( ldq_u $3,0($7) ) # .. L .. .. : Forward fetch for fallthrough code
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/arch/m68k/ifpsp060/ |
D | os.S | 155 dmrbuae:movs.b (%a0),%d0 | fetch user byte 157 dmrbs: move.b (%a0),%d0 | fetch super byte 191 dmrwuae:movs.w (%a0), %d0 | fetch user word 193 dmrws: move.w (%a0), %d0 | fetch super word 226 dmrluae:movs.l (%a0),%d0 | fetch user longword 228 dmrls: move.l (%a0),%d0 | fetch super longword
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/arch/unicore32/ |
D | Kconfig | 164 Unicore processors can not fetch/store information which is not 165 naturally aligned on the bus, i.e., a 4 byte fetch must start at an 167 fetch/store instructions will be emulated in software if you say
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/arch/unicore32/kernel/ |
D | head.S | 177 nop @ fetch inst by phys addr 179 nop8 @ fetch inst by phys addr
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/arch/sh/kernel/cpu/sh3/ |
D | swsusp.S | 116 stc r2_bank, k0 ! fetch old sp from r2_bank0 120 stc r0_bank, k3 ! fetch old pr from r0_bank0
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/arch/x86/include/asm/ |
D | kvm_emulate.h | 117 int (*fetch)(struct x86_emulate_ctxt *ctxt, member 285 struct fetch_cache fetch; member
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/arch/arm/nwfpe/ |
D | entry.S | 85 ldr r1, [sp, #S_PSR] @ fetch the PSR
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/arch/arm/mach-omap2/ |
D | sram34xx.S | 260 ldr r12, omap_sdrc_rfr_ctrl_0_val @ fetch value from SRAM 261 ldr r11, omap3_sdrc_rfr_ctrl_0 @ fetch addr from SRAM
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/arch/sh/ |
D | Kconfig.cpu | 74 This enables support for a speculative instruction fetch for
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/arch/x86/kvm/ |
D | trace.h | 776 __entry->rip = vcpu->arch.emulate_ctxt.fetch.start; 779 - vcpu->arch.emulate_ctxt.fetch.start; 781 vcpu->arch.emulate_ctxt.fetch.data,
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D | paging_tmpl.h | 466 static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr, in FNAME() argument 639 sptep = FNAME(fetch)(vcpu, addr, &walker, user_fault, write_fault, in FNAME()
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D | emulate.c | 562 unsigned size, bool write, bool fetch, in __linearize() argument 589 if (!fetch && (desc.type & 8) && !(desc.type & 2)) in __linearize() 622 if (fetch ? ctxt->mode != X86EMUL_MODE_PROT64 : ctxt->ad_bytes != 8) in __linearize() 665 struct fetch_cache *fc = &ctxt->fetch; in do_insn_fetch_byte() 679 rc = ctxt->ops->fetch(ctxt, linear, fc->data + cur_size, in do_insn_fetch_byte() 3810 ctxt->fetch.start = ctxt->_eip; in x86_decode_insn() 3811 ctxt->fetch.end = ctxt->fetch.start + insn_len; in x86_decode_insn() 3813 memcpy(ctxt->fetch.data, insn, insn_len); in x86_decode_insn()
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/arch/frv/ |
D | Kconfig | 164 write won't fetch a cacheline into the cache if there isn't already
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/arch/powerpc/boot/dts/ |
D | virtex440-ml507.dts | 105 xlnx,icu-rd-fetch-plb-prio = <0>;
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D | virtex440-ml510.dts | 100 xlnx,icu-rd-fetch-plb-prio = <0x0>;
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/arch/sparc/lib/ |
D | checksum_32.S | 137 addx %g0, %o2, %o2 ! fetch final carry
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/arch/x86/math-emu/ |
D | README | 134 The FPU instruction may be (usually will be) loaded into the pre-fetch
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