Searched refs:hit (Results 1 – 16 of 16) sorted by relevance
/arch/arm/kernel/ |
D | kprobes-test.c | 1199 int hit; member 1221 probe->hit = -1; in register_test_probe() 1229 container_of(p, struct test_probe, kprobe)->hit = test_instance; in test_before_pre_handler() 1245 container_of(p, struct test_probe, kprobe)->hit = test_instance; in test_case_pre_handler() 1252 if (container_of(p, struct test_probe, kprobe)->hit == test_instance) in test_after_pre_handler() 1261 container_of(p, struct test_probe, kprobe)->hit = test_instance; in test_after_pre_handler() 1506 if (test_before_probe.hit != test_instance) { in kprobes_test_case_end() 1511 if (test_after_probe.hit != test_instance && in kprobes_test_case_end() 1512 test_after2_probe.hit != test_instance) { in kprobes_test_case_end() 1536 if (test_case_probe.hit != test_instance) { in kprobes_test_case_end() [all …]
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/arch/mn10300/kernel/ |
D | kgdb.c | 362 bool hit = false; in kgdb_arch_undo_singlestep() local 369 hit = true; in kgdb_arch_undo_singlestep() 379 hit = true; in kgdb_arch_undo_singlestep() 392 return hit; in kgdb_arch_undo_singlestep()
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/arch/arm/boot/compressed/ |
D | head-xscale.S | 20 @ memory to be sure we hit the same cache.
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/arch/alpha/lib/ |
D | strrchr.S | 40 bne t1, $eos # .. e1 : did we already hit the terminator?
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D | ev67-strrchr.S | 62 bne t1, $eos # U : did we already hit the terminator?
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/arch/sh/ |
D | Kconfig.debug | 29 performance hit. Most users should say N.
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/arch/powerpc/platforms/8xx/ |
D | Kconfig | 133 performance hit.
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/arch/frv/mm/ |
D | tlb-miss.S | 304 # - need to check IAMR1 lest we cause an multiple-DAT-hit exception
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/arch/arm/mach-omap2/ |
D | sram242x.S | 309 str r10, [r11] @ hit DLLB also
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D | sram243x.S | 309 str r10, [r11] @ hit DLLB also
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D | Kconfig | 375 issue is hit, the path remains consistently broken). Async bridge
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/arch/arm/mach-ixp4xx/ |
D | Kconfig | 221 plus a spinlock, but in some cases the performance hit is
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/arch/sh/lib/ |
D | memcpy-sh4.S | 450 ! and dest hit the same cache line, this will thrash, so make
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/arch/arm/ |
D | Kconfig | 1377 can populate the micro-TLB with a stale entry which may be hit with 1393 bool "ARM errata: Possible cache data corruption with hit-under-miss enabled" 1398 hit-under-miss enabled). It sets the undocumented bit 31 in 1400 register, thus disabling hit-under-miss without putting the
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/arch/ia64/ |
D | Kconfig | 385 performance hit.
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/arch/x86/ |
D | Kconfig | 632 Unfortunately the downside is an up to 5% performance hit on
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