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Searched refs:iclk (Results 1 – 6 of 6) sorted by relevance

/arch/arm/mach-omap1/
Dclock.c61 struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; in omap1_clk_allow_idle() local
66 if (iclk->no_idle_count > 0 && !(--iclk->no_idle_count)) in omap1_clk_allow_idle()
67 arm_idlect1_mask |= 1 << iclk->idlect_shift; in omap1_clk_allow_idle()
72 struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; in omap1_clk_deny_idle() local
77 if (iclk->no_idle_count++ == 0) in omap1_clk_deny_idle()
78 arm_idlect1_mask &= ~(1 << iclk->idlect_shift); in omap1_clk_deny_idle()
/arch/powerpc/sysdev/
Dfsl_gtm.c173 u8 iclk = GTMDR_ICLK_ICLK; in gtm_set_ref_timer16() local
193 iclk = GTMDR_ICLK_SLGO; in gtm_set_ref_timer16()
218 clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) | in gtm_set_ref_timer16()
/arch/arm/mach-omap2/
Dpm34xx.c175 u32 wkst, fclk, iclk, clken; in prcm_clear_mod_irqs() local
187 iclk = omap2_cm_read_mod_reg(module, iclk_off); in prcm_clear_mod_irqs()
204 omap2_cm_write_mod_reg(iclk, module, iclk_off); in prcm_clear_mod_irqs()
Dtimer.c173 timer->iclk = clk_get(NULL, name); in omap_dm_timer_init_one()
174 if (IS_ERR(timer->iclk)) { in omap_dm_timer_init_one()
Dsram34xx.S208 bic r12, r12, #EN_SDRC_MASK @ disable iclk bit for SDRC
233 orr r12, r12, #EN_SDRC_MASK @ enable iclk bit for SDRC
/arch/arm/plat-omap/include/plat/
Ddmtimer.h262 struct clk *iclk, *fclk; member