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/arch/x86/um/
Dtls_32.c64 int idx; in get_free_idx() local
69 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx()
70 if (!t->arch.tls_array[idx].present) in get_free_idx()
71 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx()
93 int idx; in load_TLS() local
95 for (idx = GDT_ENTRY_TLS_MIN; idx < GDT_ENTRY_TLS_MAX; idx++) { in load_TLS()
97 &to->thread.arch.tls_array[idx - GDT_ENTRY_TLS_MIN]; in load_TLS()
106 curr->tls.entry_number = idx; in load_TLS()
202 int idx, int flushed) in set_tls_entry() argument
206 if (idx < GDT_ENTRY_TLS_MIN || idx > GDT_ENTRY_TLS_MAX) in set_tls_entry()
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/arch/blackfin/kernel/cplb-nompu/
Dcplbmgr.c39 static inline void write_dcplb_data(int cpu, int idx, unsigned long data, in write_dcplb_data() argument
43 bfin_write32(DCPLB_DATA0 + idx * 4, data); in write_dcplb_data()
44 bfin_write32(DCPLB_ADDR0 + idx * 4, addr); in write_dcplb_data()
48 dcplb_tbl[cpu][idx].addr = addr; in write_dcplb_data()
49 dcplb_tbl[cpu][idx].data = data; in write_dcplb_data()
53 static inline void write_icplb_data(int cpu, int idx, unsigned long data, in write_icplb_data() argument
57 bfin_write32(ICPLB_DATA0 + idx * 4, data); in write_icplb_data()
58 bfin_write32(ICPLB_ADDR0 + idx * 4, addr); in write_icplb_data()
62 icplb_tbl[cpu][idx].addr = addr; in write_icplb_data()
63 icplb_tbl[cpu][idx].data = data; in write_icplb_data()
[all …]
/arch/x86/kernel/
Dtls.c22 int idx; in get_free_idx() local
24 for (idx = 0; idx < GDT_ENTRY_TLS_ENTRIES; idx++) in get_free_idx()
25 if (desc_empty(&t->tls_array[idx])) in get_free_idx()
26 return idx + GDT_ENTRY_TLS_MIN; in get_free_idx()
30 static void set_tls_desc(struct task_struct *p, int idx, in set_tls_desc() argument
34 struct desc_struct *desc = &t->tls_array[idx - GDT_ENTRY_TLS_MIN]; in set_tls_desc()
60 int do_set_thread_area(struct task_struct *p, int idx, in do_set_thread_area() argument
69 if (idx == -1) in do_set_thread_area()
70 idx = info.entry_number; in do_set_thread_area()
76 if (idx == -1 && can_allocate) { in do_set_thread_area()
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/arch/x86/include/asm/
Dfixmap.h166 void __native_set_fixmap(enum fixed_addresses idx, pte_t pte);
167 void native_set_fixmap(enum fixed_addresses idx,
171 static inline void __set_fixmap(enum fixed_addresses idx, in __set_fixmap() argument
174 native_set_fixmap(idx, phys, flags); in __set_fixmap()
178 #define set_fixmap(idx, phys) \ argument
179 __set_fixmap(idx, phys, PAGE_KERNEL)
184 #define set_fixmap_nocache(idx, phys) \ argument
185 __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
187 #define clear_fixmap(idx) \ argument
188 __set_fixmap(idx, 0, __pgprot(0))
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/arch/frv/mb93090-mb00/
Dpci-frv.c86 int idx; in pcibios_allocate_bus_resources() local
93 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { in pcibios_allocate_bus_resources()
94 r = &dev->resource[idx]; in pcibios_allocate_bus_resources()
97 pci_claim_resource(dev, idx); in pcibios_allocate_bus_resources()
107 int idx, disabled; in pcibios_allocate_resources() local
113 for(idx = 0; idx < 6; idx++) { in pcibios_allocate_resources()
114 r = &dev->resource[idx]; in pcibios_allocate_resources()
126 if (pci_claim_resource(dev, idx) < 0) { in pcibios_allocate_resources()
150 int idx; in pcibios_assign_resources() local
160 for(idx=0; idx<6; idx++) { in pcibios_assign_resources()
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/arch/sh/kernel/cpu/sh5/
Dclock-sh5.c27 int idx = (__raw_readl(cprc_base + 0x00) >> 6) & 0x0007; in master_clk_init() local
28 clk->rate *= ifc_table[idx]; in master_clk_init()
37 int idx = (__raw_readw(cprc_base) >> 12) & 0x0007; in module_clk_recalc() local
38 return clk->parent->rate / ifc_table[idx]; in module_clk_recalc()
47 int idx = (__raw_readw(cprc_base) >> 3) & 0x0007; in bus_clk_recalc() local
48 return clk->parent->rate / ifc_table[idx]; in bus_clk_recalc()
57 int idx = (__raw_readw(cprc_base) & 0x0007); in cpu_clk_recalc() local
58 return clk->parent->rate / ifc_table[idx]; in cpu_clk_recalc()
72 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
77 if (idx < ARRAY_SIZE(sh5_clk_ops)) in arch_init_clk_ops()
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/arch/mips/mm/
Dhighmem.c47 int idx, type; in kmap_atomic() local
55 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic()
56 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic()
58 BUG_ON(!pte_none(*(kmap_pte - idx))); in kmap_atomic()
60 set_pte(kmap_pte-idx, mk_pte(page, PAGE_KERNEL)); in kmap_atomic()
80 int idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic() local
82 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic()
88 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
104 int idx, type; in kmap_atomic_pfn() local
109 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_pfn()
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/arch/sparc/mm/
Dhighmem.c36 long idx, type; in kmap_atomic() local
44 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic()
45 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic()
55 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic()
57 set_pte(kmap_pte-idx, mk_pte(page, kmap_prot)); in kmap_atomic()
83 unsigned long idx; in __kunmap_atomic() local
85 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic()
86 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN+idx)); in __kunmap_atomic()
99 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
117 unsigned long idx, vaddr = (unsigned long)ptr; in kmap_atomic_to_page() local
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/arch/sh/kernel/cpu/sh3/
Dclock-sh3.c32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
34 clk->rate *= pfc_divisors[idx]; in master_clk_init()
44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
46 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
58 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
70 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
84 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
86 if (idx < ARRAY_SIZE(sh3_clk_ops)) in arch_init_clk_ops()
[all …]
Dclock-sh7706.c28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
30 clk->rate *= pfc_divisors[idx]; in master_clk_init()
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
52 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4); in bus_clk_recalc() local
54 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
64 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
66 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
80 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
82 if (idx < ARRAY_SIZE(sh7706_clk_ops)) in arch_init_clk_ops()
[all …]
Dclock-sh7709.c28 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in master_clk_init() local
30 clk->rate *= pfc_divisors[idx]; in master_clk_init()
40 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003); in module_clk_recalc() local
42 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
52 int idx = (frqcr & 0x0080) ? in bus_clk_recalc() local
55 return clk->parent->rate * stc_multipliers[idx]; in bus_clk_recalc()
65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2); in cpu_clk_recalc() local
67 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
81 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
83 if (idx < ARRAY_SIZE(sh7709_clk_ops)) in arch_init_clk_ops()
[all …]
Dclock-sh7712.c27 int idx = (frqcr & 0x0300) >> 8; in master_clk_init() local
29 clk->rate *= multipliers[idx]; in master_clk_init()
39 int idx = frqcr & 0x0007; in module_clk_recalc() local
41 return clk->parent->rate / divisors[idx]; in module_clk_recalc()
51 int idx = (frqcr & 0x0030) >> 4; in cpu_clk_recalc() local
53 return clk->parent->rate / divisors[idx]; in cpu_clk_recalc()
66 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
68 if (idx < ARRAY_SIZE(sh7712_clk_ops)) in arch_init_clk_ops()
69 *ops = sh7712_clk_ops[idx]; in arch_init_clk_ops()
Dclock-sh7710.c38 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
39 return clk->parent->rate / md_table[idx]; in module_clk_recalc()
48 int idx = (__raw_readw(FRQCR) & 0x0700) >> 8; in bus_clk_recalc() local
49 return clk->parent->rate / md_table[idx]; in bus_clk_recalc()
58 int idx = (__raw_readw(FRQCR) & 0x0070) >> 4; in cpu_clk_recalc() local
59 return clk->parent->rate / md_table[idx]; in cpu_clk_recalc()
73 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
75 if (idx < ARRAY_SIZE(sh7710_clk_ops)) in arch_init_clk_ops()
76 *ops = sh7710_clk_ops[idx]; in arch_init_clk_ops()
Dclock-sh7705.c44 int idx = __raw_readw(FRQCR) & 0x0003; in module_clk_recalc() local
45 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
54 int idx = (__raw_readw(FRQCR) & 0x0300) >> 8; in bus_clk_recalc() local
55 return clk->parent->rate / stc_multipliers[idx]; in bus_clk_recalc()
64 int idx = (__raw_readw(FRQCR) & 0x0030) >> 4; in cpu_clk_recalc() local
65 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
79 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
81 if (idx < ARRAY_SIZE(sh7705_clk_ops)) in arch_init_clk_ops()
82 *ops = sh7705_clk_ops[idx]; in arch_init_clk_ops()
/arch/microblaze/include/asm/
Dfixmap.h58 extern void __set_fixmap(enum fixed_addresses idx,
61 #define set_fixmap(idx, phys) \ argument
62 __set_fixmap(idx, phys, PAGE_KERNEL)
66 #define set_fixmap_nocache(idx, phys) \ argument
67 __set_fixmap(idx, phys, PAGE_KERNEL_CI)
69 #define clear_fixmap(idx) \ argument
70 __set_fixmap(idx, 0, __pgprot(0))
85 static __always_inline unsigned long fix_to_virt(const unsigned int idx) in fix_to_virt() argument
96 if (idx >= __end_of_fixed_addresses) in fix_to_virt()
99 return __fix_to_virt(idx); in fix_to_virt()
/arch/powerpc/include/asm/
Dfixmap.h58 extern void __set_fixmap (enum fixed_addresses idx,
61 #define set_fixmap(idx, phys) \ argument
62 __set_fixmap(idx, phys, PAGE_KERNEL)
66 #define set_fixmap_nocache(idx, phys) \ argument
67 __set_fixmap(idx, phys, PAGE_KERNEL_NCG)
69 #define clear_fixmap(idx) \ argument
70 __set_fixmap(idx, 0, __pgprot(0))
85 static __always_inline unsigned long fix_to_virt(const unsigned int idx) in fix_to_virt() argument
96 if (idx >= __end_of_fixed_addresses) in fix_to_virt()
99 return __fix_to_virt(idx); in fix_to_virt()
/arch/sh/kernel/cpu/sh4a/
Dubc.c18 #define UBC_CBR(idx) (0xff200000 + (0x20 * idx)) argument
19 #define UBC_CRR(idx) (0xff200004 + (0x20 * idx)) argument
20 #define UBC_CAR(idx) (0xff200008 + (0x20 * idx)) argument
21 #define UBC_CAMR(idx) (0xff20000c + (0x20 * idx)) argument
35 static void sh4a_ubc_enable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_enable() argument
37 __raw_writel(UBC_CBR_CE | info->len | info->type, UBC_CBR(idx)); in sh4a_ubc_enable()
38 __raw_writel(info->address, UBC_CAR(idx)); in sh4a_ubc_enable()
41 static void sh4a_ubc_disable(struct arch_hw_breakpoint *info, int idx) in sh4a_ubc_disable() argument
43 __raw_writel(0, UBC_CBR(idx)); in sh4a_ubc_disable()
44 __raw_writel(0, UBC_CAR(idx)); in sh4a_ubc_disable()
Dclock-sh7770.c33 int idx = ((__raw_readl(FRQCR) >> 28) & 0x000f); in module_clk_recalc() local
34 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
43 int idx = (__raw_readl(FRQCR) & 0x000f); in bus_clk_recalc() local
44 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
53 int idx = ((__raw_readl(FRQCR) >> 24) & 0x000f); in cpu_clk_recalc() local
54 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
68 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
70 if (idx < ARRAY_SIZE(sh7770_clk_ops)) in arch_init_clk_ops()
71 *ops = sh7770_clk_ops[idx]; in arch_init_clk_ops()
/arch/powerpc/mm/
Dhighmem.c35 int idx, type; in kmap_atomic_prot() local
43 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_prot()
44 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_prot()
46 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic_prot()
48 __set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot), 1); in kmap_atomic_prot()
69 unsigned int idx; in __kunmap_atomic() local
71 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic()
72 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic()
78 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
/arch/microblaze/mm/
Dhighmem.c38 int idx, type; in kmap_atomic_prot() local
47 idx = type + KM_TYPE_NR*smp_processor_id(); in kmap_atomic_prot()
48 vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx); in kmap_atomic_prot()
50 BUG_ON(!pte_none(*(kmap_pte-idx))); in kmap_atomic_prot()
52 set_pte_at(&init_mm, vaddr, kmap_pte-idx, mk_pte(page, prot)); in kmap_atomic_prot()
72 unsigned int idx; in __kunmap_atomic() local
74 idx = type + KM_TYPE_NR * smp_processor_id(); in __kunmap_atomic()
75 BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); in __kunmap_atomic()
81 pte_clear(&init_mm, vaddr, kmap_pte-idx); in __kunmap_atomic()
/arch/sh/kernel/cpu/sh4/
Dclock-sh4.c40 int idx = (__raw_readw(FRQCR) & 0x0007); in module_clk_recalc() local
41 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
50 int idx = (__raw_readw(FRQCR) >> 3) & 0x0007; in bus_clk_recalc() local
51 return clk->parent->rate / bfc_divisors[idx]; in bus_clk_recalc()
60 int idx = (__raw_readw(FRQCR) >> 6) & 0x0007; in cpu_clk_recalc() local
61 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
75 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
77 if (idx < ARRAY_SIZE(sh4_clk_ops)) in arch_init_clk_ops()
78 *ops = sh4_clk_ops[idx]; in arch_init_clk_ops()
/arch/um/include/asm/
Dfixmap.h43 extern void __set_fixmap (enum fixed_addresses idx,
46 #define set_fixmap(idx, phys) \ argument
47 __set_fixmap(idx, phys, PAGE_KERNEL)
51 #define set_fixmap_nocache(idx, phys) \ argument
52 __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
75 static inline unsigned long fix_to_virt(const unsigned int idx) in fix_to_virt() argument
86 if (idx >= __end_of_fixed_addresses) in fix_to_virt()
89 return __fix_to_virt(idx); in fix_to_virt()
/arch/sparc/include/asm/
Dfixmap.h57 extern void __set_fixmap (enum fixed_addresses idx,
60 #define set_fixmap(idx, phys) \ argument
61 __set_fixmap(idx, phys, PAGE_KERNEL)
65 #define set_fixmap_nocache(idx, phys) \ argument
66 __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
87 static inline unsigned long fix_to_virt(const unsigned int idx) in fix_to_virt() argument
98 if (idx >= __end_of_fixed_addresses) in fix_to_virt()
101 return __fix_to_virt(idx); in fix_to_virt()
/arch/sh/include/asm/
Dfixmap.h78 extern void __set_fixmap(enum fixed_addresses idx,
80 extern void __clear_fixmap(enum fixed_addresses idx, pgprot_t flags);
82 #define set_fixmap(idx, phys) \ argument
83 __set_fixmap(idx, phys, PAGE_KERNEL)
87 #define set_fixmap_nocache(idx, phys) \ argument
88 __set_fixmap(idx, phys, PAGE_KERNEL_NOCACHE)
114 static inline unsigned long fix_to_virt(const unsigned int idx) in fix_to_virt() argument
125 if (idx >= __end_of_fixed_addresses) in fix_to_virt()
128 return __fix_to_virt(idx); in fix_to_virt()
/arch/sh/kernel/cpu/sh2a/
Dclock-sh7201.c39 int idx = (__raw_readw(FREQCR) & 0x0007); in module_clk_recalc() local
40 return clk->parent->rate / pfc_divisors[idx]; in module_clk_recalc()
49 int idx = (__raw_readw(FREQCR) & 0x0007); in bus_clk_recalc() local
50 return clk->parent->rate / pfc_divisors[idx]; in bus_clk_recalc()
59 int idx = ((__raw_readw(FREQCR) >> 4) & 0x0007); in cpu_clk_recalc() local
60 return clk->parent->rate / ifc_divisors[idx]; in cpu_clk_recalc()
74 void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx) in arch_init_clk_ops() argument
83 if (idx < ARRAY_SIZE(sh7201_clk_ops)) in arch_init_clk_ops()
84 *ops = sh7201_clk_ops[idx]; in arch_init_clk_ops()

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