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/arch/m68k/ifpsp060/
Dfplsp.doc36 FP instructions not implemented in 68060 hardware. These
37 instructions normally take exception vector #11
40 By re-compiling a program that uses these instructions, and
42 instructions, a program can avoid the overhead associated
110 this exception using implemented floating-point instructions.
120 The package does not attempt to correctly emulate instructions
126 subroutine calls for all fp instructions. The code does NOT emulate
Disp.doc36 This exception is taken when any of the integer instructions
38 isp.sa provides full emulation support for these instructions.
40 The unimplemented integer instructions are:
174 The instructions "cas2" and "cas" (when used with a misaligned effective
176 060ISP is installed properly, these instructions will enter through the
Dilsp.doc35 and the "cmp2" instruction. These instructions are not
39 By re-compiling a program that uses these instructions, and
41 instructions, a program can avoid the overhead associated with
Dfskeleton.S207 | vector number 11: FP Unimplemented Instructions, FP implemented instructions when
208 | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
221 | vector number 11: FP Unimplemented Instructions, FP implemented instructions when
222 | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
Dfpsp.doc35 These exception handlers emulate Unimplemented FP instructions,
36 instructions using unimplemented data types, and instructions
/arch/ia64/
DKconfig.debug47 compare-and-exchange instructions. This is slow! Itaniums
56 and restore instructions. It's useful for tracking down spinlock
/arch/m68k/ifpsp060/src/
DREADME-SRC2 support code, providing emulation for rarely used m68k instructions
/arch/arm/nwfpe/
DChangeLog74 * README.FPE - fix typo in description of lfm/sfm instructions
80 * README.FPE - fix description of URD, NRM instructions
81 * TODO - remove URD, NRM instructions from TODO list
Dentry.S112 @ We need to be prepared for the instructions at .Lx1 and .Lx2
Dfpmodule.inl28 for this in this routine. LDF/STF instructions with Rn = PC
/arch/x86/
DKconfig.cpu77 extended instructions.
84 Pentium Pro extended instructions, and disables the init-time guard
103 extended prefetch instructions in addition to the Pentium II
154 some extended instructions, and passes appropriate optimization
162 some extended instructions, and passes appropriate optimization
169 Enables use of some extended instructions, and passes appropriate
191 treat this chip as a 586TSC with some extended instructions
199 treat this chip as a 586TSC with some extended instructions
233 kernel due to them lacking the 3DNow! instructions used in earlier
DMakefile_32.cpu71 # binutils from generating NOPL instructions against our will.
/arch/x86/math-emu/
DREADME154 an 80486DX. A 80486DX will allow some floating point instructions to
156 will not allow this in 16-bit protected mode: no instructions are
165 upon instruction mix. Relative performance is best for the instructions
166 which require most computation. The simple instructions are adversely
171 The times include load/store instructions. All times are in microseconds
233 these never exceeds 1/2 an lsb. The fprem and fprem1 instructions
316 The results show that the fsin, fcos and fptan instructions return
319 between -pi/2 and +pi/2. The other instructions have a lower
346 instructions return results which are in error for more than 10
351 was obtained per one million arguments. For three of the instructions,
[all …]
/arch/arm/kernel/
Dentry-armv.S540 * instructions; all instructions with bit 27 set are well
541 * defined. The only instructions that should fault are the
542 * co-processor instructions. However, we have to watch out
546 * NEON instructions are co-processor instructions, so we have
/arch/powerpc/platforms/
DKconfig.cputype123 the scheduling of instructions, not the selection of instructions
212 processes can execute altivec instructions.
229 processes can execute VSX instructions.
282 'spe enable' bit so user processes can execute SPE instructions.
DKconfig229 mean that extra synchronization instructions are required near
230 certain instructions, typically those that make major changes to the
231 CPU state. These extra instructions reduce performance slightly.
232 If you say N here, these extra instructions will not be included,
/arch/arm/mach-omap1/
Dsleep.S268 @ Errata (HEL3SU467, section 1.4.4) specifies nop-instructions
274 @ => 74 nop-instructions
/arch/powerpc/
DKconfig.debug53 bool "Emulated instructions tracking"
56 Adds code to keep track of the number of instructions that are
58 of emulated instructions are available under
62 warnings can be printed to the console when instructions are
/arch/sh/include/asm/
Ddwarf.h264 unsigned char *instructions; member
/arch/m68k/
DKconfig.cpu266 instructions to be emulated by the kernel on machines that lack a
286 This option prevents any floating-point instructions from being
310 bool "Use read-modify-write instructions"
313 This allows to use certain instructions that work with indivisible
/arch/frv/
DKconfig288 is faster than absolute instructions and saves space (2 instructions
292 value used in the load and store instructions is limited to a 12-bit
/arch/openrisc/
DREADME.openrisc20 Build instructions for OpenRISC toolchain and Linux
/arch/m68k/fpsp040/
Dx_fline.S7 | floating point instructions. If so, let fpsp_unimp handle it.
/arch/sh/kernel/
Dhead_32.S322 SYNCO() ! Wait for pending instructions..
/arch/frv/kernel/
Dcmode.S88 # (4) Preload a series of following instructions to the instruction

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