/arch/mips/pnx8550/common/ |
D | int.c | 105 static inline void mask_gic_int(unsigned int irq_nr) in mask_gic_int() argument 108 PNX8550_GIC_REQ(irq_nr) = 1<<28; /* set priority to 0 */ in mask_gic_int() 111 static inline void unmask_gic_int(unsigned int irq_nr) in unmask_gic_int() argument 114 PNX8550_GIC_REQ(irq_nr) = (1<<26 | 1<<16) | (1<<28) | gic_prio[irq_nr]; in unmask_gic_int() 119 unsigned int irq_nr = d->irq; in mask_irq() local 121 if ((PNX8550_INT_CP0_MIN <= irq_nr) && (irq_nr <= PNX8550_INT_CP0_MAX)) { in mask_irq() 122 modify_cp0_intmask(1 << irq_nr, 0); in mask_irq() 123 } else if ((PNX8550_INT_GIC_MIN <= irq_nr) && in mask_irq() 124 (irq_nr <= PNX8550_INT_GIC_MAX)) { in mask_irq() 125 mask_gic_int(irq_nr - PNX8550_INT_GIC_MIN); in mask_irq() [all …]
|
/arch/mips/txx9/generic/ |
D | irq_tx4939.c | 55 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; in tx4939_irq_unmask() local 58 if (irq_nr < 32) { in tx4939_irq_unmask() 59 irq_nr--; in tx4939_irq_unmask() 60 lvlp = &tx4939_ircptr->lvl[(irq_nr % 16) / 2].r; in tx4939_irq_unmask() 62 irq_nr -= 32; in tx4939_irq_unmask() 63 lvlp = &tx4939_ircptr->lvl[8 + (irq_nr % 16) / 2].r; in tx4939_irq_unmask() 65 ofs = (irq_nr & 16) + (irq_nr & 1) * 8; in tx4939_irq_unmask() 67 | (tx4939irq[irq_nr].level << ofs), in tx4939_irq_unmask() 73 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; in tx4939_irq_mask() local 76 if (irq_nr < 32) { in tx4939_irq_mask() [all …]
|
/arch/mips/kernel/ |
D | irq_txx9.c | 68 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; in txx9_irq_unmask() local 69 u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16 ) / 2]; in txx9_irq_unmask() 70 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; in txx9_irq_unmask() 73 | (txx9irq[irq_nr].level << ofs), in txx9_irq_unmask() 84 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; in txx9_irq_mask() local 85 u32 __iomem *ilrp = &txx9_ircptr->ilr[(irq_nr % 16) / 2]; in txx9_irq_mask() 86 int ofs = irq_nr / 16 * 16 + (irq_nr & 1) * 8; in txx9_irq_mask() 104 unsigned int irq_nr = d->irq - TXX9_IRQ_BASE; in txx9_irq_mask_ack() local 108 if (unlikely(TXx9_IRCR_EDGE(txx9irq[irq_nr].mode))) in txx9_irq_mask_ack() 109 __raw_writel(TXx9_IRSCR_EIClrE | irq_nr, &txx9_ircptr->scr); in txx9_irq_mask_ack() [all …]
|
/arch/mips/lantiq/ |
D | irq.c | 83 int irq_nr = d->irq - INT_NUM_IRQ0; in ltq_disable_irq() local 85 ier += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET); in ltq_disable_irq() 86 irq_nr %= INT_NUM_IM_OFFSET; in ltq_disable_irq() 87 ltq_icu_w32(ltq_icu_r32(ier) & ~(1 << irq_nr), ier); in ltq_disable_irq() 94 int irq_nr = d->irq - INT_NUM_IRQ0; in ltq_mask_and_ack_irq() local 96 ier += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET); in ltq_mask_and_ack_irq() 97 isr += LTQ_ICU_OFFSET * (irq_nr / INT_NUM_IM_OFFSET); in ltq_mask_and_ack_irq() 98 irq_nr %= INT_NUM_IM_OFFSET; in ltq_mask_and_ack_irq() 99 ltq_icu_w32(ltq_icu_r32(ier) & ~(1 << irq_nr), ier); in ltq_mask_and_ack_irq() 100 ltq_icu_w32((1 << irq_nr), isr); in ltq_mask_and_ack_irq() [all …]
|
/arch/powerpc/sysdev/ |
D | cpm2_pic.c | 83 unsigned int irq_nr = irqd_to_hwirq(d); in cpm2_mask_irq() local 85 bit = irq_to_siubit[irq_nr]; in cpm2_mask_irq() 86 word = irq_to_siureg[irq_nr]; in cpm2_mask_irq() 95 unsigned int irq_nr = irqd_to_hwirq(d); in cpm2_unmask_irq() local 97 bit = irq_to_siubit[irq_nr]; in cpm2_unmask_irq() 98 word = irq_to_siureg[irq_nr]; in cpm2_unmask_irq() 107 unsigned int irq_nr = irqd_to_hwirq(d); in cpm2_ack() local 109 bit = irq_to_siubit[irq_nr]; in cpm2_ack() 110 word = irq_to_siureg[irq_nr]; in cpm2_ack() 118 unsigned int irq_nr = irqd_to_hwirq(d); in cpm2_end_irq() local [all …]
|
D | i8259.c | 101 static void i8259_set_irq_mask(int irq_nr) in i8259_set_irq_mask() argument
|
/arch/mips/rb532/ |
D | irq.c | 82 static inline int irq_to_group(unsigned int irq_nr) in irq_to_group() argument 84 return (irq_nr - GROUP0_IRQ_BASE) >> 5; in irq_to_group() 115 unsigned int group, intr_bit, irq_nr = d->irq; in rb532_enable_irq() local 116 int ip = irq_nr - GROUP0_IRQ_BASE; in rb532_enable_irq() 120 enable_local_irq(irq_nr); in rb532_enable_irq() 136 unsigned int group, intr_bit, mask, irq_nr = d->irq; in rb532_disable_irq() local 137 int ip = irq_nr - GROUP0_IRQ_BASE; in rb532_disable_irq() 141 disable_local_irq(irq_nr); in rb532_disable_irq() 153 if (group == GPIO_MAPPED_IRQ_GROUP && irq_nr <= (GROUP4_IRQ_BASE + 13)) in rb532_disable_irq() 154 rb532_gpio_set_istat(0, irq_nr - GPIO_MAPPED_IRQ_BASE); in rb532_disable_irq()
|
/arch/mips/txx9/jmr3927/ |
D | irq.c | 53 unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC; in mask_irq_ioc() local 55 unsigned int bit = 1 << irq_nr; in mask_irq_ioc() 63 unsigned int irq_nr = d->irq - JMR3927_IRQ_IOC; in unmask_irq_ioc() local 65 unsigned int bit = 1 << irq_nr; in unmask_irq_ioc()
|
/arch/mips/lasat/ |
D | interrupt.c | 37 unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; in disable_lasat_irq() local 39 *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift; in disable_lasat_irq() 44 unsigned int irq_nr = d->irq - LASAT_IRQ_BASE; in enable_lasat_irq() local 46 *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift; in enable_lasat_irq()
|
/arch/arm/mach-pxa/ |
D | irq.c | 124 void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int)) in pxa_init_irq() argument 128 BUG_ON(irq_nr > MAX_INTERNAL_IRQS); in pxa_init_irq() 130 pxa_internal_irq_nr = irq_nr; in pxa_init_irq() 132 for (n = 0; n < irq_nr; n += 32) { in pxa_init_irq() 137 for (i = n; (i < (n + 32)) && (i < irq_nr); i++) { in pxa_init_irq()
|
/arch/cris/arch-v10/kernel/ |
D | irq.c | 20 #define crisv10_mask_irq(irq_nr) (*R_VECT_MASK_CLR = 1 << (irq_nr)); argument 21 #define crisv10_unmask_irq(irq_nr) (*R_VECT_MASK_SET = 1 << (irq_nr)); argument
|
/arch/powerpc/platforms/powermac/ |
D | pic.c | 66 static void __pmac_retrigger(unsigned int irq_nr) in __pmac_retrigger() argument 68 if (irq_nr >= max_real_irqs && pmac_irq_cascade > 0) { in __pmac_retrigger() 69 __set_bit(irq_nr, ppc_lost_interrupts); in __pmac_retrigger() 70 irq_nr = pmac_irq_cascade; in __pmac_retrigger() 73 if (!__test_and_set_bit(irq_nr, ppc_lost_interrupts)) { in __pmac_retrigger() 116 static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) in __pmac_set_irq_mask() argument 118 unsigned long bit = 1UL << (irq_nr & 0x1f); in __pmac_set_irq_mask() 119 int i = irq_nr >> 5; in __pmac_set_irq_mask() 121 if ((unsigned)irq_nr >= max_irqs) in __pmac_set_irq_mask() 140 __pmac_retrigger(irq_nr); in __pmac_set_irq_mask()
|
/arch/mips/alchemy/common/ |
D | irq.c | 879 unsigned int bit, irq_nr; in au1000_init_irq() local 890 for (irq_nr = AU1000_INTC0_INT_BASE; in au1000_init_irq() 891 (irq_nr < AU1000_INTC0_INT_BASE + 32); irq_nr++) in au1000_init_irq() 892 au1x_ic_settype(irq_get_irq_data(irq_nr), IRQ_TYPE_NONE); in au1000_init_irq() 894 for (irq_nr = AU1000_INTC1_INT_BASE; in au1000_init_irq() 895 (irq_nr < AU1000_INTC1_INT_BASE + 32); irq_nr++) in au1000_init_irq() 896 au1x_ic_settype(irq_get_irq_data(irq_nr), IRQ_TYPE_NONE); in au1000_init_irq() 902 irq_nr = map->irq; in au1000_init_irq() 904 if (irq_nr >= AU1000_INTC1_INT_BASE) { in au1000_init_irq() 905 bit = irq_nr - AU1000_INTC1_INT_BASE; in au1000_init_irq() [all …]
|
/arch/mips/dec/ |
D | int-handler.S | 161 bgez a0,handle_it # irq_nr >= 0? 162 # irq_nr < 0: it is an address 210 bgez a0,handle_it # irq_nr >= 0? 211 # irq_nr < 0: it is an address
|
/arch/arm/mach-pxa/include/mach/ |
D | irqs.h | 114 void pxa_init_irq(int irq_nr, int (*set_wake)(struct irq_data *, unsigned int));
|
/arch/sparc/kernel/ |
D | leon_kernel.c | 483 void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu) in leon_enable_irq_cpu() argument 486 mask = get_irqmask(irq_nr); in leon_enable_irq_cpu()
|
D | pcic.c | 808 static inline unsigned long get_irqmask(int irq_nr) in get_irqmask() argument 810 return 1 << irq_nr; in get_irqmask()
|
/arch/sparc/include/asm/ |
D | leon.h | 353 void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);
|